5 from pyparsing
import *
8 from collections
import defaultdict
10 import regs
as regs_module
17 log = logging.getLogger(
"aarch64dis")
18 console_handler = logging.StreamHandler()
19 console_handler.setFormatter(logging.Formatter(
"%(levelname)-5s: %(message)s"))
20 log.addHandler(console_handler)
21 log.setLevel(logging.DEBUG)
66 WZR: m2_expr.ExprInt32(0),
67 XZR: m2_expr.ExprInt64(0),
78 if not t
in mn_aarch64.regs.all_regs_ids_byname:
81 r = mn_aarch64.regs.all_regs_ids_byname[t]
88 return m2_expr.ExprInt32(a)
92 if not t
in mn_aarch64.regs.all_regs_ids_byname:
95 r = mn_aarch64.regs.all_regs_ids_byname[t]
102 return m2_expr.ExprInt64(a)
104 my_var_parser32 =
parse_ast(ast_id2expr32, ast_int2expr32)
105 my_var_parser64 =
parse_ast(ast_id2expr64, ast_int2expr64)
107 base_expr32.setParseAction(my_var_parser32)
108 base_expr64.setParseAction(my_var_parser64)
111 int_or_expr = base_expr
112 int_or_expr32 = base_expr32
113 int_or_expr64 = base_expr64
116 shift2expr_dct = {
'LSL':
'<<',
'LSR':
'>>',
'ASR':
'a>>',
'ROR':
'>>>'}
117 shift_str = [
"LSL",
"LSR",
"ASR",
"ROR"]
118 shift_expr = [
"<<",
">>",
"a>>",
'>>>']
122 return shift2expr_dct[t[0]]
137 if t[0].size == 32
and isinstance(t[2], m2_expr.ExprInt):
138 t[2] = m2_expr.ExprInt32(t[2].arg)
139 return m2_expr.ExprOp(t[1], t[0], t[2])
141 raise ValueError(
'bad string')
148 if t[0].size == 32
and isinstance(t[2], m2_expr.ExprInt):
149 t[2] = m2_expr.ExprInt32(t[2].arg)
151 raise ValueError(
'bad op')
152 return m2_expr.ExprOp(
"slice_at", t[0], t[2])
154 raise ValueError(
'bad string')
160 return m2_expr.ExprOp(t[1], t[0], t[2])
167 return m2_expr.ExprOp(t[1], t[0], t[2])
170 shift_str).setParseAction(op_shift2expr)
173 [
"LSL"]).setParseAction(op_shift2expr)
175 extend_lst = [
'UXTB',
'UXTH',
'UXTW',
'UXTX',
'SXTB',
'SXTH',
'SXTW',
'SXTX']
176 extend2_lst = [
'UXTW',
'LSL',
'SXTW',
'SXTX']
182 gpregz32_extend = (gpregsz32_info.parser + Optional(
183 all_extend_t + int_or_expr32)).setParseAction(extend2expr)
184 gpregz64_extend = (gpregsz64_info.parser + Optional(
185 all_extend_t + int_or_expr64)).setParseAction(extend2expr)
188 shift32_off = (gpregsz32_info.parser + Optional(all_binaryop_lsl_t +
189 (gpregs32_info.parser | int_or_expr))).setParseAction(shift2expr)
190 shift64_off = (gpregsz64_info.parser + Optional(all_binaryop_lsl_t +
191 (gpregs64_info.parser | int_or_expr))).setParseAction(shift2expr)
194 shiftimm_imm_sc = (int_or_expr + all_binaryop_shiftleft_t +
195 int_or_expr).setParseAction(shift2expr_sc)
197 shiftimm_off_sc = shiftimm_imm_sc | int_or_expr
200 shift_off = (shift32_off | shift64_off)
201 reg_ext_off = (gpregz32_extend | gpregz64_extend)
203 gpregs_32_64 = (gpregs32_info.parser | gpregs64_info.parser)
204 gpregsz_32_64 = (gpregsz32_info.parser | gpregsz64_info.parser | int_or_expr)
206 simdregs = (simd08_info.parser | simd16_info.parser |
207 simd32_info.parser | simd64_info.parser)
208 simdregs_h = (simd32_info.parser | simd64_info.parser | simd128_info.parser)
210 simdregs_h_zero = (simd32_info.parser |
211 simd64_info.parser | simd128_info.parser | int_or_expr)
215 if not t
in mn_aarch64.regs.all_regs_ids_byname:
218 r = mn_aarch64.regs.all_regs_ids_byname[t]
223 return m2_expr.ExprInt64(a)
225 gpregs_info = {32: gpregs32_info,
227 gpregsz_info = {32: gpregsz32_info,
231 simds_info = {8: simd08_info,
239 base_expr.setParseAction(my_var_parser)
245 return m2_expr.ExprOp(
"preinc", t[0], m2_expr.ExprInt64(0))
250 if t[1]
in regs_module.all_regs_ids:
252 return m2_expr.ExprOp(
"postinc", t[0], t[1])
257 if t[1]
in regs_module.all_regs_ids:
259 return m2_expr.ExprOp(
"preinc", t[0], t[1])
264 if t[1]
in regs_module.all_regs_ids:
266 return m2_expr.ExprOp(
"preinc_wb", t[0], t[1])
268 LBRACK = Suppress(
"[")
269 RBRACK = Suppress(
"]")
270 COMMA = Suppress(
",")
271 POSTINC = Suppress(
"!")
274 LBRACK + gpregs64_info.parser + RBRACK).setParseAction(deref2expr_nooff)
275 deref_off_post = Group(LBRACK + gpregs64_info.parser +
276 RBRACK + COMMA + int_or_expr64).setParseAction(deref2expr_post)
277 deref_off_pre = Group(LBRACK + gpregs64_info.parser +
278 COMMA + int_or_expr64 + RBRACK).setParseAction(deref2expr_pre)
279 deref_off_pre_wb = Group(LBRACK + gpregs64_info.parser + COMMA +
280 int_or_expr64 + RBRACK + POSTINC).setParseAction(deref2expr_pre_wb)
282 deref = (deref_off_post | deref_off_pre_wb | deref_off_pre | deref_nooff)
291 return m2_expr.ExprOp(
'segm', t[0], m2_expr.ExprOp(t[2], t[1], expr))
293 return m2_expr.ExprOp(
'segm', t[0], t[1])
295 raise ValueError(
"cad deref")
297 deref_ext2 = Group(LBRACK + gpregs_32_64 + COMMA + gpregs_32_64 +
298 Optional(all_extend2_t + int_or_expr) + RBRACK).setParseAction(deref_ext2op)
309 'EQ',
'NE',
'CS',
'CC',
310 'MI',
'PL',
'VS',
'VC',
311 'HI',
'LS',
'GE',
'LT',
312 'GT',
'LE',
'AL',
'NV']
315 'NE',
'EQ',
'CC',
'CS',
316 'PL',
'MI',
'VC',
'VS',
317 'LS',
'HI',
'LT',
'GE',
318 'LE',
'GT',
'NV',
'AL']
320 BRCOND = [
'B.' + cond
for cond
in CONDS] + [
'CBZ',
'CBNZ',
'TBZ',
'TBNZ']
323 conds_expr, _, conds_info =
gen_regs(CONDS, {})
324 conds_inv_expr, _, conds_inv_info =
gen_regs(CONDS_INV, {})
331 super(instruction_aarch64, self).
__init__(*args, **kargs)
336 if isinstance(e, m2_expr.ExprId)
or isinstance(e, m2_expr.ExprInt):
338 elif isinstance(e, m2_expr.ExprOp)
and e.op
in shift_expr:
339 op_str = shift_str[shift_expr.index(e.op)]
340 return "%s %s %s" % (e.args[0], op_str, e.args[1])
341 elif isinstance(e, m2_expr.ExprOp)
and e.op ==
"slice_at":
342 return "%s LSL %s" % (e.args[0], e.args[1])
343 elif isinstance(e, m2_expr.ExprOp)
and e.op
in extend_lst:
345 return "%s %s %s" % (e.args[0], op_str, e.args[1])
346 elif isinstance(e, m2_expr.ExprOp)
and e.op ==
"postinc":
347 if e.args[1].arg != 0:
348 return "[%s], %s" % (e.args[0], e.args[1])
350 return "[%s]" % (e.args[0])
351 elif isinstance(e, m2_expr.ExprOp)
and e.op ==
"preinc_wb":
352 if e.args[1].arg != 0:
353 return "[%s, %s]!" % (e.args[0], e.args[1])
355 return "[%s]" % (e.args[0])
356 elif isinstance(e, m2_expr.ExprOp)
and e.op ==
"preinc":
358 return "[%s]" % (e.args[0])
359 elif not isinstance(e.args[1], m2_expr.ExprInt)
or e.args[1].arg != 0:
360 return "[%s, %s]" % (e.args[0], e.args[1])
362 return "[%s]" % (e.args[0])
363 elif isinstance(e, m2_expr.ExprOp)
and e.op ==
'segm':
365 if isinstance(arg, m2_expr.ExprId):
367 elif arg.op ==
'LSL' and arg.args[1].arg == 0:
368 arg = str(arg.args[0])
370 arg =
"%s %s %s" % (arg.args[0], arg.op, arg.args[1])
371 return '[%s, %s]' % (e.args[0], arg)
374 raise NotImplementedError(
"bad op")
377 return self.
name in self.
name in BRCOND + [
"B",
"BL"]
380 if self.
name in [
'CBZ',
'CBNZ']:
382 elif self.
name in [
'TBZ',
'TBNZ']:
390 if not isinstance(e, m2_expr.ExprInt):
392 ad = e.arg + self.offset
393 l = symbol_pool.getby_offset_create(ad)
394 s = m2_expr.ExprId(l, e.size)
398 return self.
name in BRCOND + [
"BR",
"BLR",
"RET",
"ERET",
"DRPS",
"B",
"BL"]
401 return self.
name in [
"BLR",
"BL"]
405 return [self.
args[index]]
408 return self.
name in BRCOND + [
"BLR",
"BL"]
416 if self.offset
is None:
417 raise ValueError(
'symbol not resolved %s' % l)
418 if not isinstance(e, m2_expr.ExprInt):
419 log.debug(
'dyn dst %r', e)
421 off = e.arg - self.offset
423 raise ValueError(
'strange offset! %r' % off)
424 self.
args[index] = m2_expr.ExprInt64(off)
435 all_mn_mode = defaultdict(list)
436 all_mn_name = defaultdict(list)
437 all_mn_inst = defaultdict(list)
438 pc = {
'l': PC,
'b': PC}
439 sp = {
'l': SP,
'b': SP}
440 instruction = instruction_aarch64
441 max_instruction_len = 4
455 if hasattr(self,
"lnk"):
456 info.lnk = self.lnk.value != 0
464 if n > bs.getlen() * 8:
465 raise ValueError(
'not enought bits %r %r' % (n, len(bs.bin) * 8))
468 n_offset = cls.endian_offset(attrib, offset)
469 c = cls.getbytes(bs, n_offset, 1)
486 return (offset & ~3) + 3 - offset % 4
490 raise NotImplementedError(
'bad attrib')
494 l = sum([x.l
for x
in fields])
495 assert l == 32,
"len %r" % l
503 l = sum([x.l
for x
in fields])
511 return [(subcls, name, bases, dct, fields)]
514 v = super(mn_aarch64, self).
value(mode)
516 return [x[::-1]
for x
in v]
518 return [x
for x
in v]
520 raise NotImplementedError(
'bad attrib')
527 if hasattr(self,
"sf"):
532 dct = {
"fields": fields,
"alias":alias}
535 type(name, (mn_aarch64,), dct)
539 parser = gpregs_32_64
540 gpregs_info = gpregs_info
543 size = 64
if self.parent.sf.value
else 32
560 simd_size = [8, 16, 32, 64]
563 if self.parent.size.value > len(self.
simd_size):
565 size = self.
simd_size[self.parent.size.value]
566 self.
expr = simds_info[size].expr[v]
572 if not self.
expr in simds_info[self.expr.size].expr:
574 self.
value = simds_info[self.expr.size].expr.index(self.
expr)
575 self.parent.size.value = self.simd_size.index(self.expr.size)
581 simd_size = [32, 64, 128]
590 parser = simdregs_h_zero
593 if v == 0
and self.parent.opc.value == 1:
594 size = 64
if self.parent.size.value
else 32
595 self.
expr = m2_expr.ExprInt(0, size)
598 return super(aarch64_simdreg_32_64_zero, self).
decode(v)
601 if isinstance(self.
expr, m2_expr.ExprInt):
602 self.parent.opc.value = 1
606 self.parent.opc.value = 0
607 return super(aarch64_simdreg_32_64_zero, self).
encode()
611 parser = gpregs_32_64
614 size = 32
if self.parent.sf.value
else 64
615 self.
expr = gpregs_info[size].expr[v]
619 if not self.
expr in gpregs_info[self.expr.size].expr:
621 self.
value = gpregs_info[self.expr.size].expr.index(self.
expr)
622 self.parent.sf.value = 1
if self.expr.size == 32
else 0
630 class aarch64_gpreg_n1(aarch64_gpreg):
635 return super(aarch64_gpreg_n1, self).
decode(v)
638 super(aarch64_gpreg_n1, self).
encode()
639 return self.
value != 0b11111
643 parser = gpregsz_32_64
644 gpregs_info = gpregsz_info
648 parser = gpregsz_32_64
649 gpregs_info = gpregsz_info
652 size = 64
if self.parent.sf.value
else 32
654 self.
expr = m2_expr.ExprInt(0, size)
660 if isinstance(self.
expr, m2_expr.ExprInt):
661 if self.expr.arg == 0:
677 parser = reg_info.parser
681 reg_info = gpregs32_info
685 reg_info = gpregs64_info
689 reg_info = gpregs32_info
690 parser = reg_info.parser
694 reg_info = gpregs32_info
695 parser = reg_info.parser
699 reg_info = gpregs64_info
700 parser = reg_info.parser
704 reg_info = gpregs64_info
705 parser = reg_info.parser
709 reg_info = gpregsz32_info
710 parser = reg_info.parser
714 reg_info = gpregsz32_info
715 parser = reg_info.parser
719 reg_info = gpregsz64_info
720 parser = reg_info.parser
724 reg_info = gpregsz64_info
725 parser = reg_info.parser
729 reg_info = simd08_info
730 parser = reg_info.parser
734 reg_info = simd08_info
735 parser = reg_info.parser
739 reg_info = simd16_info
740 parser = reg_info.parser
744 reg_info = simd16_info
745 parser = reg_info.parser
749 reg_info = simd32_info
750 parser = reg_info.parser
754 reg_info = simd32_info
755 parser = reg_info.parser
759 reg_info = simd64_info
760 parser = reg_info.parser
764 reg_info = simd64_info
765 parser = reg_info.parser
769 reg_info = simd128_info
770 parser = reg_info.parser
774 reg_info = simd128_info
775 parser = reg_info.parser
789 intmask = (1 << intsize) - 1
790 int2expr =
lambda self, x: m2_expr.ExprInt64(
797 intmask = (1 << intsize) - 1
798 int2expr =
lambda self, x: m2_expr.ExprInt64(x)
806 if size == expr.size:
809 expr = m2_expr.ExprInt(int(expr.arg), size)
811 if expr.arg > (1 << size) - 1:
813 expr = m2_expr.ExprInt(int(expr.arg), size)
821 start, stop = super(aarch64_imm_sf, self).
fromstring(s, parser_result)
824 size = self.parent.args[0].expr.size
825 if self.
expr in gpregs64_info.expr + gpregs32_info.expr:
827 if isinstance(self.
expr, m2_expr.ExprOp):
836 if not isinstance(self.
expr, m2_expr.ExprInt):
840 value = int(self.expr.arg)
841 if value >= 1 << self.l:
847 size = 64
if self.parent.sf.value
else 32
848 self.
expr = m2_expr.ExprInt(v, size)
855 if not isinstance(self.
expr, m2_expr.ExprInt):
859 value = int(self.expr.arg)
860 if value < 1 << self.l:
861 self.parent.shift.value = 0
866 if value >= 1 << self.l:
868 self.parent.shift.value = 1
873 size = 64
if self.parent.sf.value
else 32
874 if self.parent.shift.value == 0:
875 self.
expr = m2_expr.ExprInt(v, size)
876 elif self.parent.shift.value == 1:
877 self.
expr = m2_expr.ExprInt(v << 12, size)
882 OPTION2SIZE = [32, 32, 32, 64,
890 if not isinstance(self.
expr, m2_expr.ExprOp):
892 if self.expr.op
not in extend_lst:
894 reg, amount = self.expr.args
896 if not reg
in gpregsz_info[self.expr.size].expr:
898 self.
value = gpregsz_info[self.expr.size].expr.index(reg)
899 option = extend_lst.index(self.expr.op)
900 if self.expr.size != OPTION2SIZE[option]:
903 self.parent.option.value = option
904 self.parent.imm.value = int(amount.arg)
908 if self.parent.sf.value == 0:
909 size = 64
if self.parent.sf.value
else 32
911 size = OPTION2SIZE[self.parent.option.value]
912 reg = gpregsz_info[size].expr[v]
914 self.
expr = m2_expr.ExprOp(extend_lst[self.parent.option.value],
915 reg, m2_expr.ExprInt_from(reg, self.parent.imm.value))
918 EXT2_OP = {0b010:
'UXTW',
922 EXT2_OP_INV = dict([(items[1], items[0])
for items
in EXT2_OP.items()])
929 return self.parent.size.value
932 if not isinstance(self.
expr, m2_expr.ExprOp):
934 arg0, arg1 = self.expr.args
935 if not (isinstance(self.
expr, m2_expr.ExprOp)
and self.expr.op ==
'segm'):
937 if not arg0
in self.parent.rn.reg_info.expr:
939 self.parent.rn.value = self.parent.rn.reg_info.expr.index(arg0)
941 self.parent.shift.value = 0
942 if isinstance(arg1, m2_expr.ExprId):
944 self.parent.option.value = 0b011
946 elif isinstance(arg1, m2_expr.ExprOp)
and arg1.op
in EXT2_OP.values():
950 if not (reg.size
in gpregs_info
and
951 reg
in gpregs_info[reg.size].expr):
953 self.
value = gpregs_info[reg.size].expr.index(reg)
956 if not (isinstance(arg1.args[1], m2_expr.ExprInt)):
958 if arg1.op
not in EXT2_OP_INV:
960 self.parent.option.value = EXT2_OP_INV[arg1.op]
961 if arg1.args[1].arg == 0:
962 self.parent.shift.value = 0
965 if arg1.args[1].arg != self.
get_size():
968 self.parent.shift.value = 1
973 opt = self.parent.option.value
974 if opt
in [0, 1, 4, 5]:
977 reg_expr = gpregsz32_info.expr
979 reg_expr = gpregsz64_info.expr
983 if self.parent.shift.value == 1:
984 arg = m2_expr.ExprOp(EXT2_OP[opt], arg,
985 m2_expr.ExprInt_from(arg, self.
get_size()))
987 arg = m2_expr.ExprOp(EXT2_OP[opt], arg,
988 m2_expr.ExprInt_from(arg, 0))
990 reg = self.parent.rn.reg_info.expr[self.parent.rn.value]
991 self.
expr = m2_expr.ExprOp(
'segm', reg, arg)
1002 if not hasattr(parent,
'sf'):
1004 if parent.sf.value ==
None:
1005 parent.sf.value = 1
if size == 64
else 0
1007 psize = 64
if parent.sf.value
else 32
1008 return psize == size
1012 reg_info = gpregsz_info
1016 size = self.expr.size
1019 if isinstance(self.
expr, m2_expr.ExprId):
1020 if not size
in gpregs_info:
1024 self.parent.shift.value = 0
1025 self.parent.imm.value = 0
1029 if not isinstance(self.
expr, m2_expr.ExprOp):
1031 if not self.expr.op
in shift_expr:
1033 args = self.expr.args
1034 if not args[0]
in self.
reg_info[size].expr:
1036 if not isinstance(args[1], m2_expr.ExprInt):
1038 self.parent.shift.value = shift_expr.index(self.expr.op)
1039 self.parent.imm.value = int(args[1].arg)
1044 size = 64
if self.parent.sf.value
else 32
1046 amount = self.parent.imm.value
1049 shift_expr[self.parent.shift.value], e, m2_expr.ExprInt_from(e, amount))
1055 return (value >> amount) | (value << (size - amount))
1059 return (value << amount) | (value >> (size - amount))
1061 UINTS = {32: uint32, 64: uint64}
1065 for i
in xrange(0, size):
1066 mod_value = int(
rol(value, i, size))
1067 if (mod_value + 1) & mod_value == 0:
1076 size = 64
if self.parent.sf.value
else 32
1077 mask = UINTS[size]((1 << (v + 1)) - 1)
1078 mask =
ror(mask, self.parent.immr.value, size)
1079 self.
expr = m2_expr.ExprInt(mask, size)
1083 if not isinstance(self.
expr, m2_expr.ExprInt):
1087 value = self.expr.arg
1094 power = int(
rol(value, index, self.expr.size)) + 1
1096 for i
in xrange(self.expr.size):
1102 self.parent.immr.value = index
1104 self.parent.immn.value = 1
if self.expr.size == 64
else 0
1116 v = ((v << 2) | self.parent.immlo.value) << 12
1122 v = int(self.expr.arg)
1128 self.parent.immlo.value = v & 3
1138 v = ((v << 2) | self.parent.immlo.value)
1144 v = int(self.expr.arg)
1147 self.parent.immlo.value = v & 3
1149 if v > (1 << 19) - 1:
1160 size = 64
if self.parent.sf.value
else 32
1161 self.
expr = m2_expr.ExprInt(v << (16 * self.parent.hw.value), size)
1165 if not isinstance(self.
expr, m2_expr.ExprInt):
1167 size = self.parent.args[0].expr.size
1170 value = int(self.expr.arg)
1171 mask = (1 << size) - 1
1172 for i
in xrange(size / 16):
1173 if ((0xffff << (i * 16)) ^ mask) & value:
1175 self.parent.hw.value = i
1182 parser = shiftimm_off_sc
1183 shift_op =
'slice_at'
1186 size = 64
if self.parent.sf.value
else 32
1187 expr = m2_expr.ExprInt(v, size)
1188 amount = m2_expr.ExprInt(16 * self.parent.hw.value, size)
1189 if self.parent.hw.value:
1196 if isinstance(self.
expr, m2_expr.ExprInt):
1197 if self.expr.arg > 0xFFFF:
1200 self.parent.hw.value = 0
1203 if not (isinstance(self.
expr, m2_expr.ExprOp)
and
1205 len(self.expr.args) == 2
and
1206 isinstance(self.expr.args[0], m2_expr.ExprInt)
and
1207 isinstance(self.expr.args[1], m2_expr.ExprInt)):
1209 if set_imm_to_size(self.parent.args[0].expr.size, self.expr.args[0])
is None:
1211 if set_imm_to_size(self.parent.args[0].expr.size, self.expr.args[1])
is None:
1213 arg, amount = [int(arg.arg)
for arg
in self.expr.args]
1216 if amount % 16
or amount / 16 > 4:
1219 self.parent.hw.value = amount / 16
1234 if not isinstance(self.
expr, m2_expr.ExprInt):
1236 v = int(self.expr.arg)
1238 v &= (1 << (self.l + 2)) - 1
1244 if hasattr(parent,
'simm'):
1245 mask = (1 << parent.simm.l) - 1
1246 if imm !=
sign_ext(imm & mask, parent.simm.l, 64):
1248 parent.simm.value = imm & mask
1249 elif hasattr(parent,
'uimm'):
1250 mask = (1 << parent.uimm.l) - 1
1253 parent.uimm.value = imm
1255 raise ValueError(
'unknown imm')
1260 if not hasattr(parent,
"size"):
1262 if hasattr(parent.size,
"amount"):
1263 size = parent.size.amount
1265 size = parent.size.value
1279 if hasattr(self.parent,
"postpre"):
1280 if self.parent.postpre.value == 0:
1289 reg = gpregs64_info.expr[v]
1290 off = self.parent.imm.expr.arg
1293 self.
expr = m2_expr.ExprOp(op, reg, m2_expr.ExprInt64(off))
1298 if not isinstance(expr, m2_expr.ExprOp):
1300 if not expr.op
in [
'postinc',
'preinc_wb',
'preinc']:
1302 if hasattr(self.parent,
"postpre"):
1303 if expr.op ==
'postinc':
1304 self.parent.postpre.value = 0
1306 self.parent.postpre.value = 1
1307 reg, off = expr.args
1308 if not reg
in gpregs64_info.expr:
1310 if not isinstance(off, m2_expr.ExprInt):
1316 self.parent.imm.expr = m2_expr.ExprInt64(imm)
1317 if not self.parent.imm.encode():
1319 self.
value = gpregs64_info.expr.index(reg)
1332 if off & ((1 << size) - 1):
1339 parser = deref_nooff
1342 reg = gpregs64_info.expr[v]
1343 self.
expr = m2_expr.ExprOp(
'preinc', reg)
1348 if not isinstance(expr, m2_expr.ExprOp):
1350 if expr.op !=
'preinc':
1352 if len(expr.args) == 1:
1354 elif len(expr.args) == 2:
1355 reg, off = expr.args
1356 if not isinstance(off, m2_expr.ExprInt):
1363 if not reg
in gpregs64_info.expr:
1365 self.
value = gpregs64_info.expr.index(reg)
1370 size2scale = {32: 2, 64: 3}
1373 size = 2 + self.parent.sf.value
1377 size = self.parent.args[0].expr.size
1381 off = int(mod_size2int[size](off) >> scale)
1386 size2scale = {32: 2, 64: 3, 128: 4}
1389 size = 2 + self.parent.size.value
1396 return getattr(self.
parent, self.ref).value == v
1402 sf =
bs(l=1, fname=
'sf', order=-1)
1406 reg_info = conds_info
1407 parser = reg_info.parser
1411 reg_info = conds_inv_info
1412 parser = reg_info.parser
1420 self.parent.rt.expr, (self.parent.sf.value << self.
l) | v)
1424 if not isinstance(self.
expr, m2_expr.ExprInt):
1426 size = self.parent.args[0].expr.size
1427 value = int(self.expr.arg)
1429 if self.parent.sf.value
is None:
1430 self.parent.sf.value = value >> self.
l
1433 return value >> self.
l == self.parent.sf.value
1436 shift =
bs(l=2, fname=
'shift')
1438 shiftb =
bs(l=1, fname=
'shift', order=-1)
1441 rn64_v =
bs(l=5, cls=(aarch64_gpreg64_nodec,), fname=
'rn', order=-1)
1443 rn =
bs(l=5, cls=(aarch64_gpreg,), fname=
"rn")
1444 rs =
bs(l=5, cls=(aarch64_gpreg,), fname=
"rs")
1445 rm =
bs(l=5, cls=(aarch64_gpreg,), fname=
"rm")
1446 rd =
bs(l=5, cls=(aarch64_gpreg,), fname=
"rd")
1447 ra =
bs(l=5, cls=(aarch64_gpregz,), fname=
"ra")
1448 rt =
bs(l=5, cls=(aarch64_gpregz,), fname=
"rt")
1449 rt2 =
bs(l=5, cls=(aarch64_gpregz,), fname=
"rt2")
1450 rn0 =
bs(l=5, cls=(aarch64_gpreg0,), fname=
"rn")
1452 rmz =
bs(l=5, cls=(aarch64_gpregz,), fname=
"rm")
1453 rnz =
bs(l=5, cls=(aarch64_gpregz,), fname=
"rn")
1454 rdz =
bs(l=5, cls=(aarch64_gpregz,), fname=
"rd")
1457 rn_n1 =
bs(l=5, cls=(aarch64_gpreg_n1,), fname=
"rn")
1458 rm_n1 =
bs(l=5, cls=(aarch64_gpreg_n1,), fname=
"rm")
1461 rn_na =
bs(l=5, cls=(aarch64_gpreg_noarg,), fname=
"rn", order=-1)
1462 rn32_na =
bs(l=5, cls=(aarch64_gpreg32_noarg,), fname=
"rn", order=-1)
1463 rn64_na =
bs(l=5, cls=(aarch64_gpreg64_noarg,), fname=
"rn", order=-1)
1465 sd1 =
bs(l=5, cls=(aarch64_simdreg_h,), fname=
"rt")
1466 sd2 =
bs(l=5, cls=(aarch64_simdreg_h,), fname=
"rt2")
1468 sdn_32_64 =
bs(l=5, cls=(aarch64_simdreg_32_64,), fname=
"rn")
1469 sdd_32_64 =
bs(l=5, cls=(aarch64_simdreg_32_64,), fname=
"rd")
1470 sdm_32_64 =
bs(l=5, cls=(aarch64_simdreg_32_64,), fname=
"rm")
1471 sda_32_64 =
bs(l=5, cls=(aarch64_simdreg_32_64,), fname=
"ra")
1474 sdm_32_64_zero =
bs(l=5, cls=(aarch64_simdreg_32_64_zero,), fname=
"rm")
1476 crn =
bs(l=4, cls=(aarch64_crreg,), fname=
"crn")
1477 crm =
bs(l=4, cls=(aarch64_crreg,), fname=
"crm")
1480 rn64 =
bs(l=5, cls=(aarch64_gpreg64,), fname=
"rn")
1481 rs64 =
bs(l=5, cls=(aarch64_gpreg64,), fname=
"rs")
1482 rm64 =
bs(l=5, cls=(aarch64_gpreg64,), fname=
"rm")
1483 rd64 =
bs(l=5, cls=(aarch64_gpreg64,), fname=
"rd")
1484 rt64 =
bs(l=5, cls=(aarch64_gpregz64,), fname=
"rt")
1485 ra64 =
bs(l=5, cls=(aarch64_gpregz64,), fname=
"ra")
1487 rn32 =
bs(l=5, cls=(aarch64_gpreg32,), fname=
"rn")
1488 rm32 =
bs(l=5, cls=(aarch64_gpreg32,), fname=
"rm")
1489 rd32 =
bs(l=5, cls=(aarch64_gpreg32,), fname=
"rd")
1490 rs32 =
bs(l=5, cls=(aarch64_gpreg32,), fname=
"rs")
1492 sd08 =
bs(l=5, cls=(aarch64_simd08,), fname=
"rd")
1493 sd16 =
bs(l=5, cls=(aarch64_simd16,), fname=
"rd")
1494 sd32 =
bs(l=5, cls=(aarch64_simd32,), fname=
"rd")
1495 sd64 =
bs(l=5, cls=(aarch64_simd64,), fname=
"rd")
1496 sd128 =
bs(l=5, cls=(aarch64_simd128,), fname=
"rd")
1498 sn08 =
bs(l=5, cls=(aarch64_simd08,), fname=
"rn")
1499 sn16 =
bs(l=5, cls=(aarch64_simd16,), fname=
"rn")
1500 sn32 =
bs(l=5, cls=(aarch64_simd32,), fname=
"rn")
1501 sn64 =
bs(l=5, cls=(aarch64_simd64,), fname=
"rn")
1502 sn128 =
bs(l=5, cls=(aarch64_simd128,), fname=
"rn")
1505 rt32 =
bs(l=5, cls=(aarch64_gpregz32,), fname=
"rt")
1507 rt_isf =
bs(l=5, cls=(aarch64_gpreg_isf,), fname=
"rt")
1509 rn64_deref =
bs(l=5, cls=(aarch64_deref,), fname=
"rn")
1510 rn64_deref_sz =
bs(l=5, cls=(aarch64_deref_size,), fname=
"rn")
1511 rn64_deref_sf =
bs(l=5, cls=(aarch64_sf_scale,), fname=
"rn")
1512 rn64_deref_sd =
bs(l=5, cls=(aarch64_sd_scale,), fname=
"rn")
1514 rn64_deref_nooff =
bs(l=5, cls=(aarch64_deref_nooff,), fname=
"rn")
1516 imm_sft_12 =
bs(l=12, cls=(aarch64_imm_sft,))
1519 imm32_3 =
bs(l=3, fname=
"imm")
1520 imm6 =
bs(l=6, fname=
"imm", order=-1)
1521 imm3 =
bs(l=3, fname=
"imm", order=-1)
1522 simm6 =
bs(l=6, cls=(aarch64_int64_noarg, m_arg), fname=
"imm", order=-1)
1523 simm9 =
bs(l=9, cls=(aarch64_int64_noarg,), fname=
"imm", order=-1)
1524 simm7 =
bs(l=7, cls=(aarch64_int64_noarg,), fname=
"imm", order=-1)
1525 nzcv =
bs(l=4, cls=(aarch64_uint64_noarg, m_arg), fname=
"nzcv", order=-1)
1526 uimm5 =
bs(l=5, cls=(aarch64_uint64_noarg, m_arg), fname=
"imm", order=-1)
1527 uimm12 =
bs(l=12, cls=(aarch64_uint64_noarg,), fname=
"imm", order=-1)
1528 uimm16 =
bs(l=16, cls=(aarch64_uint64_noarg, m_arg), fname=
"imm", order=-1)
1529 uimm7 =
bs(l=7, cls=(aarch64_uint64_noarg,), fname=
"imm", order=-1)
1531 uimm8 =
bs(l=8, cls=(aarch64_uint64,), fname=
"imm", order=-1)
1533 op1 =
bs(l=3, cls=(aarch64_uint64, m_arg), fname=
"op1")
1534 op2 =
bs(l=3, cls=(aarch64_uint64, m_arg), fname=
"op2")
1537 imm16 =
bs(l=16, fname=
"imm", order=-1)
1540 immlo =
bs(l=2, fname=
'immlo')
1541 immhip =
bs(l=19, cls=(aarch64_immhip_page,))
1542 immhi =
bs(l=19, cls=(aarch64_immhi_page,))
1544 option =
bs(l=3, fname=
'option', order=-1)
1547 rm_ext =
bs(l=5, cls=(aarch64_gpreg_ext,), fname=
"rm")
1548 rm_sft =
bs(l=5, cls=(aarch64_gpreg_sftimm,), fname=
"rm")
1550 rm_ext2 =
bs(l=5, cls=(aarch64_gpreg_ext2,), fname=
"rm")
1551 rm_ext2_128 =
bs(l=5, cls=(aarch64_gpreg_ext2_128,), fname=
"rm")
1554 imms =
bs(l=6, cls=(aarch64_imm_nsr,), fname=
'imms')
1555 immr =
bs(l=6, fname=
'immr')
1556 immn =
bs(l=1, fname=
'immn')
1559 imm16_hw =
bs(l=16, cls=(aarch64_imm_hw,), fname=
'imm')
1560 imm16_hw_sc =
bs(l=16, cls=(aarch64_imm_hw_sc,), fname=
'imm')
1564 a_imms =
bs(l=6, cls=(aarch64_imm_sf, m_arg), fname=
"imm1", order=-1)
1565 a_immr =
bs(l=6, cls=(aarch64_imm_sf, m_arg), fname=
"imm1", order=-1)
1569 adsu_name = {
'ADD': 0,
'SUB': 1}
1573 offs19 =
bs(l=19, cls=(aarch64_offs,), fname=
'off')
1574 offs26 =
bs(l=26, cls=(aarch64_offs,), fname=
'off')
1575 offs14 =
bs(l=14, cls=(aarch64_offs,), fname=
'off')
1577 b40 =
bs(l=5, cls=(aarch64_b40,), fname=
'b40', order=1)
1579 sdsize1 =
bs(l=1, fname=
"size")
1581 sdsize =
bs(l=2, fname=
"size")
1582 opsize =
bs(l=2, fname=
"size")
1583 sd =
bs(l=5, cls=(aarch64_simdreg,), fname=
'sd')
1585 opc =
bs(l=1, fname=
'opc', order=-1)
1588 aarch64op(
"addsub", [sf, bs_adsu_name, modf,
bs(
'10001'), shift, imm_sft_12, rn, rd], [rd, rn, imm_sft_12])
1589 aarch64op(
"cmp", [sf,
bs(
'1'),
bs(
'1'),
bs(
'10001'), shift, imm_sft_12, rn,
bs(
'11111')], [rn, imm_sft_12], alias=
True)
1590 aarch64op(
"cmn", [sf,
bs(
'0'),
bs(
'1'),
bs(
'10001'), shift, imm_sft_12, rn,
bs(
'11111')], [rn, imm_sft_12], alias=
True)
1592 aarch64op(
"adrp", [
bs(
'1'), immlo,
bs(
'10000'), immhip, rd64], [rd64, immhip])
1593 aarch64op(
"adr", [
bs(
'0'), immlo,
bs(
'10000'), immhi, rd64], [rd64, immhi])
1596 aarch64op(
"addsub", [sf, bs_adsu_name, modf,
bs(
'01011'), shift,
bs(
'0'), rm_sft, imm6, rn, rd], [rd, rn, rm_sft])
1597 aarch64op(
"cmp", [sf,
bs(
'1'),
bs(
'1'),
bs(
'01011'), shift,
bs(
'0'), rm_sft, imm6, rn,
bs(
'11111')], [rn, rm_sft], alias=
True)
1599 aarch64op(
"addsub", [sf, bs_adsu_name, modf,
bs(
'01011'),
bs(
'00'),
bs(
'1'), rm_ext, option, imm3, rn, rd], [rd, rn, rm_ext])
1603 aarch64op(
"neg", [sf,
bs(
'1'), modf,
bs(
'01011'), shift,
bs(
'0'), rm_sft, imm6,
bs(
'11111'), rd], [rd, rm_sft], alias=
True)
1606 logic_name = {
'AND': 0,
'ORR': 1,
'EOR': 2}
1609 aarch64op(
"logic", [sf, bs_logic_name,
bs(
'100100'), immn, immr, imms, rn0, rd], [rd, rn0, imms])
1611 aarch64op(
"ands", [sf,
bs(
'11'),
bs(
'100100'), immn, immr, imms, rn0, rdz], [rdz, rn0, imms])
1612 aarch64op(
"tst", [sf,
bs(
'11'),
bs(
'100100'), immn, immr, imms, rn0,
bs(
'11111')], [rn0, imms], alias=
True)
1616 logicbf_name = {
'SBFM': 0b00,
'BFM': 0b01,
'UBFM': 0b10}
1618 aarch64op(
"logic", [sf, bs_logicbf_name,
bs(
'100110'),
bs(l=1, cls=(aarch64_eq,), ref=
"sf"), a_immr, a_imms, rn, rd], [rd, rn, a_immr, a_imms])
1622 aarch64op(
"and", [sf,
bs(
'00'),
bs(
'01010'), shift,
bs(
'0'), rm_sft, imm6, rn, rd], [rd, rn, rm_sft])
1623 aarch64op(
"bic", [sf,
bs(
'00'),
bs(
'01010'), shift,
bs(
'1'), rm_sft, imm6, rn, rd], [rd, rn, rm_sft])
1624 aarch64op(
"orr", [sf,
bs(
'01'),
bs(
'01010'), shift,
bs(
'0'), rm_sft, imm6, rn, rd], [rd, rn, rm_sft])
1625 aarch64op(
"orn", [sf,
bs(
'01'),
bs(
'01010'), shift,
bs(
'1'), rm_sft, imm6, rn, rd], [rd, rn, rm_sft])
1626 aarch64op(
"mvn", [sf,
bs(
'01'),
bs(
'01010'), shift,
bs(
'1'), rm_sft, imm6,
bs(
'11111'), rd], [rd, rm_sft], alias=
True)
1627 aarch64op(
"eor", [sf,
bs(
'10'),
bs(
'01010'), shift,
bs(
'0'), rm_sft, imm6, rn, rd], [rd, rn, rm_sft])
1628 aarch64op(
"eon", [sf,
bs(
'10'),
bs(
'01010'), shift,
bs(
'1'), rm_sft, imm6, rn, rd], [rd, rn, rm_sft])
1629 aarch64op(
"ands", [sf,
bs(
'11'),
bs(
'01010'), shift,
bs(
'0'), rm_sft, imm6, rn, rd], [rd, rn, rm_sft])
1630 aarch64op(
"tst", [sf,
bs(
'11'),
bs(
'01010'), shift,
bs(
'0'), rm_sft, imm6, rn,
bs(
'11111')], [rn, rm_sft], alias=
True)
1631 aarch64op(
"bics", [sf,
bs(
'11'),
bs(
'01010'), shift,
bs(
'1'), rm_sft, imm6, rn, rd], [rd, rn, rm_sft])
1634 aarch64op(
"mov", [sf,
bs(
'01'),
bs(
'01010'),
bs(
'00'),
bs(
'0'), rmz,
bs(
'000000'),
bs(
'11111'), rd], [rd, rmz], alias=
True)
1638 bcond =
bs_mod_name(l=4, fname=
'cond', mn_mod=[
'EQ',
'NE',
'CS',
'CC',
1639 'MI',
'PL',
'VS',
'VC',
1640 'HI',
'LS',
'GE',
'LT',
1641 'GT',
'LE',
'AL',
'NV'])
1643 cond_arg =
bs(l=4, cls=(aarch64_cond_arg,), fname=cond)
1644 cond_inv_arg =
bs(l=4, cls=(aarch64_cond_inv_arg,), fname=cond)
1646 aarch64op(
"br", [
bs(
'1101011'),
bs(
'0000'),
bs(
'11111'),
bs(
'000000'), rn64,
bs(
'00000')], [rn64])
1647 aarch64op(
"blr", [
bs(
'1101011'),
bs(
'0001'),
bs(
'11111'),
bs(
'000000'), rn64,
bs(
'00000')], [rn64])
1648 aarch64op(
"ret", [
bs(
'1101011'),
bs(
'0010'),
bs(
'11111'),
bs(
'000000'), rn64,
bs(
'00000')], [rn64])
1657 post_pre =
bs(l=1, order=-1, fname=
'postpre')
1660 ccmp_name = {
'CCMN': 0,
'CCMP': 1}
1662 aarch64op(
"condcmp", [sf, bs_ccmp_name,
bs(
'1'),
bs(
'11010010'), uimm5, cond_arg,
bs(
'1'),
bs(
'0'), rn,
bs(
'0'), nzcv], [rn, uimm5, nzcv, cond_arg])
1663 aarch64op(
"condcmp", [sf, bs_ccmp_name,
bs(
'1'),
bs(
'11010010'), rm, cond_arg,
bs(
'0'),
bs(
'0'), rn,
bs(
'0'), nzcv], [rn, rm, nzcv, cond_arg])
1665 ldst_b_name = {
'STRB': 0,
'LDRB': 1}
1667 ldst_name = {
'STR': 0,
'LDR': 1}
1669 ldst_h_name = {
'STRH': 0,
'LDRH': 1}
1672 ldst_tb_name = {
'STTRB': 0,
'LDTRB': 1}
1675 ldst_th_name = {
'STTRH': 0,
'LDTRH': 1}
1678 ldst_ub_name = {
'STURB': 0,
'LDURB': 1}
1680 ldst_u_name = {
'STUR': 0,
'LDUR': 1}
1683 ldst_t_name = {
'STTR': 0,
'LDTR': 1}
1686 ldst_1u_name = {
'STUR': 0b0,
'LDUR': 0b1}
1689 ldst_uh_name = {
'STURH': 0,
'LDURH': 1}
1693 ldst_sw_name = {
'STRSW': 0,
'LDRSW': 1}
1697 aarch64op(
"ldst", [
bs(
'00'),
bs(
'111'),
bs(
'0'),
bs(
'00'),
bs(
'0'), bs_ldst_b_name,
bs(
'0'), simm9, post_pre,
bs(
'1'), rn64_deref, rt32], [rt32, rn64_deref ])
1698 aarch64op(
"ldrsb", [
bs(
'00'),
bs(
'111'),
bs(
'0'),
bs(
'00'),
bs(
'1'), sf,
bs(
'0'), simm9, post_pre,
bs(
'1'), rn64_deref, rt_isf], [rt_isf, rn64_deref ])
1699 aarch64op(
"ldrsh", [
bs(
'01'),
bs(
'111'),
bs(
'0'),
bs(
'00'),
bs(
'1'), sf,
bs(
'0'), simm9, post_pre,
bs(
'1'), rn64_deref, rt_isf], [rt_isf, rn64_deref ])
1700 aarch64op(
"ldst", [
bs(
'01'),
bs(
'111'),
bs(
'0'),
bs(
'00'),
bs(
'0'), bs_ldst_h_name,
bs(
'0'), simm9, post_pre,
bs(
'1'), rn64_deref, rt32], [rt32, rn64_deref ])
1701 aarch64op(
"ldst", [
bs(
'10'),
bs(
'111'),
bs(
'0'),
bs(
'00'),
bs(
'0'), bs_ldst_name,
bs(
'0'), simm9, post_pre,
bs(
'1'), rn64_deref, rt32], [rt32, rn64_deref ])
1702 aarch64op(
"ldrsw", [
bs(
'10'),
bs(
'111'),
bs(
'0'),
bs(
'00'),
bs(
'10'),
bs(
'0'), simm9, post_pre,
bs(
'1'), rn64_deref, rt64], [rt64, rn64_deref ])
1703 aarch64op(
"ldst", [
bs(
'11'),
bs(
'111'),
bs(
'0'),
bs(
'00'),
bs(
'0'), bs_ldst_name,
bs(
'0'), simm9, post_pre,
bs(
'1'), rn64_deref, rt64], [rt64, rn64_deref ])
1705 aarch64op(
"ldst", [sdsize,
bs(
'111'),
bs(
'1'),
bs(
'00'),
bs(
'0'), bs_ldst_name,
bs(
'0'), simm9, post_pre,
bs(
'1'), rn64_deref, sd], [sd, rn64_deref ])
1706 aarch64op(
"ldst", [
bs(
'00'),
bs(
'111'),
bs(
'1'),
bs(
'00'),
bs(
'1'), bs_ldst_name,
bs(
'0'), simm9, post_pre,
bs(
'1'), rn64_deref, sd128], [sd128, rn64_deref ])
1709 aarch64op(
"ldst", [
bs(
'00', fname=
"size"),
bs(
'111'),
bs(
'0'),
bs(
'01'),
bs(
'0'), bs_ldst_b_name, uimm12, rn64_deref_sz, rt32], [rt32, rn64_deref_sz ])
1710 aarch64op(
"ldrsb", [
bs(
'00', fname=
"size"),
bs(
'111'),
bs(
'0'),
bs(
'01'),
bs(
'1'), sf, uimm12, rn64_deref_sz, rt_isf], [rt_isf, rn64_deref_sz ])
1711 aarch64op(
"ldrsh", [
bs(
'01', fname=
"size"),
bs(
'111'),
bs(
'0'),
bs(
'01'),
bs(
'1'), sf, uimm12, rn64_deref_sz, rt_isf], [rt_isf, rn64_deref_sz ])
1712 aarch64op(
"ldst", [
bs(
'01', fname=
"size"),
bs(
'111'),
bs(
'0'),
bs(
'01'),
bs(
'0'), bs_ldst_h_name, uimm12, rn64_deref_sz, rt32], [rt32, rn64_deref_sz ])
1713 aarch64op(
"ldst", [
bs(
'10', fname=
"size"),
bs(
'111'),
bs(
'0'),
bs(
'01'),
bs(
'0'), bs_ldst_name, uimm12, rn64_deref_sz, rt32], [rt32, rn64_deref_sz ])
1714 aarch64op(
"ldrsw", [
bs(
'10', fname=
"size"),
bs(
'111'),
bs(
'0'),
bs(
'01'),
bs(
'10'), uimm12, rn64_deref_sz, rt64], [rt64, rn64_deref_sz ])
1715 aarch64op(
"ldst", [
bs(
'11', fname=
"size"),
bs(
'111'),
bs(
'0'),
bs(
'01'),
bs(
'0'), bs_ldst_name, uimm12, rn64_deref_sz, rt64], [rt64, rn64_deref_sz ])
1717 aarch64op(
"ldst", [sdsize,
bs(
'111'),
bs(
'1'),
bs(
'01'),
bs(
'0'), bs_ldst_name, uimm12, rn64_deref_sz, sd], [sd, rn64_deref_sz ])
1718 aarch64op(
"ldst", [
bs(
'00'),
bs(
'111'),
bs(
'1'),
bs(
'01'),
bs(
'1', fname=
'size', amount=4), bs_ldst_name, uimm12, rn64_deref_sz, sd128], [sd128, rn64_deref_sz ])
1721 aarch64op(
"ldst", [
bs(
'00'),
bs(
'111'),
bs(
'0'),
bs(
'00'),
bs(
'0'), bs_ldst_tb_name,
bs(
'0'), simm9,
bs(
'10'), rn64_deref, rt32], [rt32, rn64_deref ])
1722 aarch64op(
"ldtrsb", [
bs(
'00'),
bs(
'111'),
bs(
'0'),
bs(
'00'),
bs(
'1'), sf,
bs(
'0'), simm9,
bs(
'10'), rn64_deref, rt_isf], [rt_isf, rn64_deref ])
1723 aarch64op(
"ldtrsh", [
bs(
'01'),
bs(
'111'),
bs(
'0'),
bs(
'00'),
bs(
'1'), sf,
bs(
'0'), simm9,
bs(
'10'), rn64_deref, rt_isf], [rt_isf, rn64_deref ])
1724 aarch64op(
"ldsttrh",[
bs(
'01'),
bs(
'111'),
bs(
'0'),
bs(
'00'),
bs(
'0'), bs_ldst_th_name,
bs(
'0'), simm9,
bs(
'10'), rn64_deref, rt32], [rt32, rn64_deref ])
1725 aarch64op(
"ldtrsw", [
bs(
'10'),
bs(
'111'),
bs(
'0'),
bs(
'00'),
bs(
'10'),
bs(
'0'), simm9,
bs(
'10'), rn64_deref, rt64], [rt64, rn64_deref ])
1726 aarch64op(
"ldstt", [
bs(
'1'), sf,
bs(
'111'),
bs(
'0'),
bs(
'00'),
bs(
'0'), bs_ldst_st_name,
bs(
'0'), simm9,
bs(
'10'), rn64_deref, rt], [rt, rn64_deref ])
1728 aarch64op(
"ldstt", [sdsize,
bs(
'111'),
bs(
'1'),
bs(
'00'),
bs(
'0'), bs_ldst_st_name,
bs(
'0'), simm9,
bs(
'10'), rn64_deref, sd], [sd, rn64_deref ])
1729 aarch64op(
"ldst", [
bs(
'00'),
bs(
'111'),
bs(
'1'),
bs(
'00'),
bs(
'1'), bs_ldst_st_name,
bs(
'0'), simm9,
bs(
'10'), rn64_deref, sd128], [sd128, rn64_deref ])
1732 aarch64op(
"ldst", [
bs(
'00'),
bs(
'111'),
bs(
'0'),
bs(
'00'),
bs(
'0'), bs_ldst_ub_name,
bs(
'0'), simm9,
bs(
'00'), rn64_deref, rt32], [rt32, rn64_deref ])
1733 aarch64op(
"ldursb", [
bs(
'00'),
bs(
'111'),
bs(
'0'),
bs(
'00'),
bs(
'1'), sf,
bs(
'0'), simm9,
bs(
'00'), rn64_deref, rt_isf], [rt_isf, rn64_deref ])
1734 aarch64op(
"ldstuh", [
bs(
'01'),
bs(
'111'),
bs(
'0'),
bs(
'00'),
bs(
'0'), bs_ldst_uh_name,
bs(
'0'), simm9,
bs(
'00'), rn64_deref, rt32], [rt32, rn64_deref ])
1735 aarch64op(
"ldursh", [
bs(
'01'),
bs(
'111'),
bs(
'0'),
bs(
'00'),
bs(
'1'), sf,
bs(
'0'), simm9,
bs(
'00'), rn64_deref, rt_isf], [rt_isf, rn64_deref ])
1736 aarch64op(
"ldursw", [
bs(
'10'),
bs(
'111'),
bs(
'0'),
bs(
'00'),
bs(
'10'),
bs(
'0'), simm9,
bs(
'00'), rn64_deref, rt64], [rt64, rn64_deref ])
1737 aarch64op(
"ldst", [
bs(
'1'), sf,
bs(
'111'),
bs(
'0'),
bs(
'00'),
bs(
'0'), bs_ldst_u_name,
bs(
'0'), simm9,
bs(
'00'), rn64_deref, rt], [rt, rn64_deref ])
1739 aarch64op(
"ldstu", [sdsize,
bs(
'111'),
bs(
'1'),
bs(
'00'),
bs(
'0'), bs_ldst_u_name,
bs(
'0'), simm9,
bs(
'00'), rn64_deref, sd], [sd, rn64_deref ])
1740 aarch64op(
"ldst", [
bs(
'00'),
bs(
'111'),
bs(
'1'),
bs(
'00'),
bs(
'1'), bs_ldst_1u_name,
bs(
'0'), simm9,
bs(
'00'), rn64_deref, sd128], [sd128, rn64_deref ])
1744 aarch64op(
"ldstrb",[
bs(
'00', fname=
"size"),
bs(
'111'),
bs(
'0'),
bs(
'00'),
bs(
'0'), bs_ldst_b_name,
bs(
'1'), rm_ext2, option, shiftb,
bs(
'10'), rn64_v, rt32], [rt32, rm_ext2])
1746 aarch64op(
"ldstrh",[
bs(
'01', fname=
"size"),
bs(
'111'),
bs(
'0'),
bs(
'00'),
bs(
'0'), bs_ldst_h_name,
bs(
'1'), rm_ext2, option, shiftb,
bs(
'10'), rn64_v, rt32], [rt32, rm_ext2])
1748 aarch64op(
"ldrsb", [
bs(
'00', fname=
"size"),
bs(
'111'),
bs(
'0'),
bs(
'00'),
bs(
'1'), sf,
bs(
'1'), rm_ext2, option, shiftb,
bs(
'10'), rn64_v, rt_isf], [rt_isf, rm_ext2])
1750 aarch64op(
"ldrsh", [
bs(
'01', fname=
"size"),
bs(
'111'),
bs(
'0'),
bs(
'00'),
bs(
'1'), sf,
bs(
'1'), rm_ext2, option, shiftb,
bs(
'10'), rn64_v, rt_isf], [rt_isf, rm_ext2])
1752 aarch64op(
"ldst", [sdsize,
bs(
'111'),
bs(
'1'),
bs(
'00'),
bs(
'0'), bs_ldst_name,
bs(
'1'), rm_ext2, option, shiftb,
bs(
'10'), rn64_v, sd], [sd, rm_ext2])
1753 aarch64op(
"ldst", [
bs(
'00', fname=
"size"),
bs(
'111'),
bs(
'1'),
bs(
'00'),
bs(
'1'), bs_ldst_name,
bs(
'1'), rm_ext2_128, option, shiftb,
bs(
'10'), rn64_v, sd128], [sd128, rm_ext2_128])
1755 aarch64op(
"str", [
bs(
'10', fname=
"size"),
bs(
'111'),
bs(
'0'),
bs(
'00'),
bs(
'0'), bs_ldst_name,
bs(
'1'), rm_ext2, option, shiftb,
bs(
'10'), rn64_v, rt32], [rt32, rm_ext2])
1757 aarch64op(
"ldrsw", [
bs(
'10', fname=
"size"),
bs(
'111'),
bs(
'0'),
bs(
'00'),
bs(
'10'),
bs(
'1'), rm_ext2, option, shiftb,
bs(
'10'), rn64_v, rt64], [rt64, rm_ext2])
1759 aarch64op(
"ldst", [
bs(
'11', fname=
"size"),
bs(
'111'),
bs(
'0'),
bs(
'00'),
bs(
'0'), bs_ldst_name,
bs(
'1'), rm_ext2, option, shiftb,
bs(
'10'), rn64_v, rt64], [rt64, rm_ext2])
1762 aarch64op(
"ldr", [
bs(
'0'), sf,
bs(
'011'),
bs(
'0'),
bs(
'00'), offs19, rt], [rt, offs19])
1763 aarch64op(
"ldr", [
bs(
'10'),
bs(
'011'),
bs(
'0'),
bs(
'00'), offs19, rt64], [rt64, offs19])
1766 aarch64op(
"ldr", [sdsize,
bs(
'011'),
bs(
'1'),
bs(
'00'), offs19, sd1], [sd1, offs19])
1770 movwide_name = {
'MOVN': 0b00,
'MOVZ': 0b10}
1773 aarch64op(
"mov", [sf, bs_movwide_name,
bs(
'100101'), hw, imm16_hw, rd], [rd, imm16_hw])
1774 aarch64op(
"movk", [sf,
bs(
'11'),
bs(
'100101'), hw, imm16_hw_sc, rd], [rd, imm16_hw_sc])
1777 ldstp_name = {
'STP': 0b0,
'LDP': 0b1}
1779 aarch64op(
"ldstp", [sf,
bs(
'0'),
bs(
'101'),
bs(
'0'),
bs(
'0'), post_pre,
bs(
'1'), bs_ldstp_name, simm7, rt2, rn64_deref_sf, rt], [rt, rt2, rn64_deref_sf])
1780 aarch64op(
"ldstp", [sf,
bs(
'0'),
bs(
'101'),
bs(
'0'),
bs(
'0'),
bs(
'1'),
bs(
'0'), bs_ldstp_name, simm7, rt2, rn64_deref_sf, rt], [rt, rt2, rn64_deref_sf])
1782 aarch64op(
"ldstp", [sdsize,
bs(
'101'),
bs(
'1'),
bs(
'0'), post_pre,
bs(
'1'), bs_ldstp_name, uimm7, sd2, rn64_deref_sd, sd1], [sd1, sd2, rn64_deref_sd])
1783 aarch64op(
"ldstp", [sdsize,
bs(
'101'),
bs(
'1'),
bs(
'0'),
bs(
'1'),
bs(
'0'), bs_ldstp_name, uimm7, sd2, rn64_deref_sd, sd1], [sd1, sd2, rn64_deref_sd])
1787 datap0_name = {
'RBIT': 0b000000,
'REV16': 0b000001,
1789 'CLZ': 0b000100,
'CLS': 0b000101}
1791 aarch64op(
"ldstp", [
bs(
'0', fname=
'sf'),
bs(
'1'), modf,
bs(
'11010110'),
bs(
'00000'), bs_datap0_name, rn, rd])
1792 datap1_name = {
'RBIT': 0b000000,
'REV16': 0b000001,
1793 'REV32': 0b000010,
'REV': 0b000011,
1794 'CLZ': 0b000100,
'CLS': 0b000101}
1796 aarch64op(
"ldstp", [
bs(
'1', fname=
'sf'),
bs(
'1'), modf,
bs(
'11010110'),
bs(
'00000'), bs_datap1_name, rn, rd])
1800 aarch64op(
"b.", [
bs(
'0101010'),
bs(
'0'), offs19,
bs(
'0'), bcond], [offs19])
1801 aarch64op(
"cbnz", [sf,
bs(
'011010'),
bs(
'1'), offs19, rt], [rt, offs19])
1802 aarch64op(
"cbz", [sf,
bs(
'011010'),
bs(
'0'), offs19, rt], [rt, offs19])
1803 aarch64op(
"tbnz", [sf,
bs(
'011011'),
bs(
'1'), b40, offs14, rt], [rt, b40, offs14])
1804 aarch64op(
"tbz", [sf,
bs(
'011011'),
bs(
'0'), b40, offs14, rt], [rt, b40, offs14])
1808 aarch64op(
"fmov", [
bs(
'000'),
bs(
'11110'),
bs(
'0'), sdsize1,
bs(
'1'),
bs(
'0000'),
bs(
'00'),
bs(
'10000'), sdn_32_64, sdd_32_64], [sdd_32_64, sdn_32_64])
1810 aarch64op(
"fmov", [
bs(
'000'),
bs(
'11110'),
bs(
'0'), sdsize1,
bs(
'1'), uimm8,
bs(
'100'),
bs(
'00000'), sdd_32_64], [sdd_32_64, uimm8])
1812 aarch64op(
"fcmp", [
bs(
'000'),
bs(
'11110'),
bs(
'0'), sdsize1,
bs(
'1'), sdm_32_64_zero,
bs(
'00'),
bs(
'1000'), sdn_32_64,
bs(
'0'), opc,
bs(
'000')], [sdn_32_64, sdm_32_64_zero])
1813 aarch64op(
"fcmpe", [
bs(
'000'),
bs(
'11110'),
bs(
'0'), sdsize1,
bs(
'1'), sdm_32_64_zero,
bs(
'00'),
bs(
'1000'), sdn_32_64,
bs(
'1'), opc,
bs(
'000')], [sdn_32_64, sdm_32_64_zero])
1815 aarch64op(
"fcvtas",[sf,
bs(
'00'),
bs(
'11110'),
bs(
'0'), sdsize1,
bs(
'1'),
bs(
'00'),
bs(
'100'),
bs(
'000000'), sdn_32_64, rd], [rd, sdn_32_64])
1816 aarch64op(
"fcvtzu",[sf,
bs(
'00'),
bs(
'11110'),
bs(
'0'), sdsize1,
bs(
'1'),
bs(
'11'),
bs(
'001'),
bs(
'000000'), sdn_32_64, rd], [rd, sdn_32_64])
1817 aarch64op(
"fcvtzs",[sf,
bs(
'00'),
bs(
'11110'),
bs(
'0'), sdsize1,
bs(
'1'),
bs(
'11'),
bs(
'000'),
bs(
'000000'), sdn_32_64, rd], [rd, sdn_32_64])
1819 aarch64op(
"fcvt", [
bs(
'000'),
bs(
'11110'),
bs(
'11'),
bs(
'1'),
bs(
'0001'),
bs(
'00'),
bs(
'10000'), sn16, sd32], [sd32, sn16])
1820 aarch64op(
"fcvt", [
bs(
'000'),
bs(
'11110'),
bs(
'11'),
bs(
'1'),
bs(
'0001'),
bs(
'01'),
bs(
'10000'), sn16, sd64], [sd64, sn16])
1821 aarch64op(
"fcvt", [
bs(
'000'),
bs(
'11110'),
bs(
'00'),
bs(
'1'),
bs(
'0001'),
bs(
'11'),
bs(
'10000'), sn32, sd16], [sd16, sn32])
1822 aarch64op(
"fcvt", [
bs(
'000'),
bs(
'11110'),
bs(
'00'),
bs(
'1'),
bs(
'0001'),
bs(
'01'),
bs(
'10000'), sn32, sd64], [sd64, sn32])
1823 aarch64op(
"fcvt", [
bs(
'000'),
bs(
'11110'),
bs(
'01'),
bs(
'1'),
bs(
'0001'),
bs(
'11'),
bs(
'10000'), sn64, sd16], [sd16, sn64])
1824 aarch64op(
"fcvt", [
bs(
'000'),
bs(
'11110'),
bs(
'01'),
bs(
'1'),
bs(
'0001'),
bs(
'00'),
bs(
'10000'), sn64, sd32], [sd32, sn64])
1830 aarch64op(
"fmov", [
bs(
'0'),
bs(
'00'),
bs(
'11110'),
bs(
'00'),
bs(
'1'),
bs(
'00'),
bs(
'110'),
bs(
'000000'), sn32, rd32], [rd32, sn32])
1831 aarch64op(
"fmov", [
bs(
'0'),
bs(
'00'),
bs(
'11110'),
bs(
'00'),
bs(
'1'),
bs(
'00'),
bs(
'111'),
bs(
'000000'), rn32, sd32], [sd32, rn32])
1832 aarch64op(
"fmov", [
bs(
'1'),
bs(
'00'),
bs(
'11110'),
bs(
'00'),
bs(
'1'),
bs(
'00'),
bs(
'110'),
bs(
'000000'), sd32, rd32], [rd32, sd32])
1833 aarch64op(
"fmov", [
bs(
'1'),
bs(
'00'),
bs(
'11110'),
bs(
'01'),
bs(
'1'),
bs(
'00'),
bs(
'111'),
bs(
'000000'), rd64, sd64], [sd64, rd64])
1834 aarch64op(
"fmov", [
bs(
'1'),
bs(
'00'),
bs(
'11110'),
bs(
'01'),
bs(
'1'),
bs(
'00'),
bs(
'110'),
bs(
'000000'), sd64, rd64], [rd64, sd64])
1839 aarch64op(
"fsub", [
bs(
'0'),
bs(
'00'),
bs(
'11110'),
bs(
'0'), sdsize1,
bs(
'1'), sdm_32_64,
bs(
'001'),
bs(
'1'),
bs(
'10'), sdn_32_64, sdd_32_64], [sdd_32_64, sdn_32_64, sdm_32_64])
1840 aarch64op(
"fadd", [
bs(
'0'),
bs(
'00'),
bs(
'11110'),
bs(
'0'), sdsize1,
bs(
'1'), sdm_32_64,
bs(
'001'),
bs(
'0'),
bs(
'10'), sdn_32_64, sdd_32_64], [sdd_32_64, sdn_32_64, sdm_32_64])
1841 aarch64op(
"fdiv", [
bs(
'0'),
bs(
'00'),
bs(
'11110'),
bs(
'0'), sdsize1,
bs(
'1'), sdm_32_64,
bs(
'000'),
bs(
'1'),
bs(
'10'), sdn_32_64, sdd_32_64], [sdd_32_64, sdn_32_64, sdm_32_64])
1842 aarch64op(
"fmul", [
bs(
'0'),
bs(
'00'),
bs(
'11110'),
bs(
'0'), sdsize1,
bs(
'1'), sdm_32_64,
bs(
'000'),
bs(
'0'),
bs(
'10'), sdn_32_64, sdd_32_64], [sdd_32_64, sdn_32_64, sdm_32_64])
1843 aarch64op(
"fnmul", [
bs(
'0'),
bs(
'00'),
bs(
'11110'),
bs(
'0'), sdsize1,
bs(
'1'), sdm_32_64,
bs(
'100'),
bs(
'0'),
bs(
'10'), sdn_32_64, sdd_32_64], [sdd_32_64, sdn_32_64, sdm_32_64])
1845 aarch64op(
"fabs", [
bs(
'0'),
bs(
'00'),
bs(
'11110'),
bs(
'0'), sdsize1,
bs(
'1'),
bs(
'0000'),
bs(
'01'),
bs(
'10000'), sdn_32_64, sdd_32_64], [sdd_32_64, sdn_32_64])
1846 aarch64op(
"fneg", [
bs(
'0'),
bs(
'00'),
bs(
'11110'),
bs(
'0'), sdsize1,
bs(
'1'),
bs(
'0000'),
bs(
'10'),
bs(
'10000'), sdn_32_64, sdd_32_64], [sdd_32_64, sdn_32_64])
1847 aarch64op(
"fsqrt", [
bs(
'0'),
bs(
'00'),
bs(
'11110'),
bs(
'0'), sdsize1,
bs(
'1'),
bs(
'0000'),
bs(
'11'),
bs(
'10000'), sdn_32_64, sdd_32_64], [sdd_32_64, sdn_32_64])
1851 aarch64op(
"fmadd", [
bs(
'0'),
bs(
'00'),
bs(
'11111'),
bs(
'0'), sdsize1,
bs(
'0'), sdm_32_64,
bs(
'0'), sda_32_64, sdn_32_64, sdd_32_64], [sdd_32_64, sdn_32_64, sdm_32_64, sda_32_64])
1852 aarch64op(
"fmsub", [
bs(
'0'),
bs(
'00'),
bs(
'11111'),
bs(
'0'), sdsize1,
bs(
'0'), sdm_32_64,
bs(
'1'), sda_32_64, sdn_32_64, sdd_32_64], [sdd_32_64, sdn_32_64, sdm_32_64, sda_32_64])
1853 aarch64op(
"fnmadd",[
bs(
'0'),
bs(
'00'),
bs(
'11111'),
bs(
'0'), sdsize1,
bs(
'1'), sdm_32_64,
bs(
'0'), sda_32_64, sdn_32_64, sdd_32_64], [sdd_32_64, sdn_32_64, sdm_32_64, sda_32_64])
1854 aarch64op(
"fnmsub",[
bs(
'0'),
bs(
'00'),
bs(
'11111'),
bs(
'0'), sdsize1,
bs(
'1'), sdm_32_64,
bs(
'1'), sda_32_64, sdn_32_64, sdd_32_64], [sdd_32_64, sdn_32_64, sdm_32_64, sda_32_64])
1857 aarch64op(
"scvtf", [sf,
bs(
'0'),
bs(
'0'),
bs(
'11110'),
bs(
'0'), sdsize1,
bs(
'1'),
bs(
'00'),
bs(
'010'),
bs(
'000000'), rn, sdd_32_64], [sdd_32_64, rn])
1858 aarch64op(
"ucvtf", [sf,
bs(
'0'),
bs(
'0'),
bs(
'11110'),
bs(
'0'), sdsize1,
bs(
'1'),
bs(
'00'),
bs(
'011'),
bs(
'000000'), rn, sdd_32_64], [sdd_32_64, rn])
1863 aarch64op(
"csel", [sf,
bs(
'0'),
bs(
'0'),
bs(
'11010100'), rmz, cond_arg,
bs(
'00'), rnz, rd], [rd, rnz, rmz, cond_arg])
1864 aarch64op(
"csinc", [sf,
bs(
'0'),
bs(
'0'),
bs(
'11010100'), rmz, cond_arg,
bs(
'01'), rnz, rd], [rd, rnz, rmz, cond_arg])
1865 aarch64op(
"csinv", [sf,
bs(
'1'),
bs(
'0'),
bs(
'11010100'), rmz, cond_arg,
bs(
'00'), rnz, rd], [rd, rnz, rmz, cond_arg])
1866 aarch64op(
"csneg", [sf,
bs(
'1'),
bs(
'0'),
bs(
'11010100'), rmz, cond_arg,
bs(
'01'), rnz, rd], [rd, rnz, rmz, cond_arg])
1867 aarch64op(
"cset", [sf,
bs(
'0'),
bs(
'0'),
bs(
'11010100'),
bs(
'11111'), cond_inv_arg,
bs(
'01'),
bs(
'11111'), rd], [rd, cond_inv_arg], alias=
True)
1868 aarch64op(
"csetm", [sf,
bs(
'1'),
bs(
'0'),
bs(
'11010100'),
bs(
'11111'), cond_inv_arg,
bs(
'00'),
bs(
'11111'), rd], [rd, cond_inv_arg], alias=
True)
1872 aarch64op(
"madd", [sf,
bs(
'00'),
bs(
'11011'),
bs(
'000'), rm,
bs(
'0'), ra, rn, rd], [rd, rn, rm, ra])
1873 aarch64op(
"msub", [sf,
bs(
'00'),
bs(
'11011'),
bs(
'000'), rm,
bs(
'1'), ra, rn, rd], [rd, rn, rm, ra])
1875 aarch64op(
"umulh", [
bs(
'1'),
bs(
'00'),
bs(
'11011'),
bs(
'110'), rm64,
bs(
'0'),
bs(
'11111'), rn64, rd64], [rd64, rn64, rm64])
1876 aarch64op(
"smulh", [
bs(
'1'),
bs(
'00'),
bs(
'11011'),
bs(
'010'), rm64,
bs(
'0'),
bs(
'11111'), rn64, rd64], [rd64, rn64, rm64])
1877 aarch64op(
"umsubh",[
bs(
'1'),
bs(
'00'),
bs(
'11011'),
bs(
'101'), rm32,
bs(
'1'), ra64, rn32, rd64], [rd64, rn32, rm32, ra64])
1880 aarch64op(
"smaddl",[
bs(
'1'),
bs(
'00'),
bs(
'11011'),
bs(
'001'), rm32,
bs(
'0'), ra64, rn32, rd64], [rd64, rn32, rm32, ra64])
1881 aarch64op(
"umaddl",[
bs(
'1'),
bs(
'00'),
bs(
'11011'),
bs(
'101'), rm32,
bs(
'0'), ra64, rn32, rd64], [rd64, rn32, rm32, ra64])
1883 aarch64op(
"smsubl",[
bs(
'1'),
bs(
'00'),
bs(
'11011'),
bs(
'001'), rm32,
bs(
'1'), ra64, rn32, rd64], [rd64, rn32, rm32, ra64])
1884 aarch64op(
"umsubl",[
bs(
'1'),
bs(
'00'),
bs(
'11011'),
bs(
'101'), rm32,
bs(
'1'), ra64, rn32, rd64], [rd64, rn32, rm32, ra64])
1887 aarch64op(
"sdiv", [sf,
bs(
'0'),
bs(
'0'),
bs(
'11010110'), rm,
bs(
'00001'),
bs(
'1'), rn, rd], [rd, rn, rm])
1888 aarch64op(
"udiv", [sf,
bs(
'0'),
bs(
'0'),
bs(
'11010110'), rm,
bs(
'00001'),
bs(
'0'), rn, rd], [rd, rn, rm])
1892 aarch64op(
"extr", [sf,
bs(
'00100111'),
bs(l=1, cls=(aarch64_eq,), ref=
"sf"),
bs(
'0'), rm, simm6, rn, rd], [rd, rn, rm, simm6])
1895 shiftr_name = {
'LSL': 0b00,
'LSR': 0b01,
'ASR': 0b10,
'ROR': 0b11}
1898 aarch64op(
"shiftr", [sf,
bs(
'0'),
bs(
'0'),
bs(
'11010110'), rm,
bs(
'0010'), bs_shiftr_name, rn, rd], [rd, rn, rm])
1901 aarch64op(
"NOP", [
bs(
'11010101000000110010000000011111')])
1904 aarch64op(
"brk", [
bs(
'11010100'),
bs(
'001'), uimm16,
bs(
'000'),
bs(
'00')], [uimm16])
1905 aarch64op(
"hlt", [
bs(
'11010100'),
bs(
'010'), uimm16,
bs(
'000'),
bs(
'00')], [uimm16])
1906 aarch64op(
"svc", [
bs(
'11010100'),
bs(
'000'), uimm16,
bs(
'000'),
bs(
'01')], [uimm16])
1907 aarch64op(
"hvc", [
bs(
'11010100'),
bs(
'000'), uimm16,
bs(
'000'),
bs(
'10')], [uimm16])
1908 aarch64op(
"smc", [
bs(
'11010100'),
bs(
'000'), uimm16,
bs(
'000'),
bs(
'11')], [uimm16])
1911 msr_name = {
'MSR': 0b0,
'MRS': 0b1}
1913 aarch64op(
"mrs", [
bs(
'1101010100'),
bs(
'1'),
bs(
'1'),
bs(
'1'), op1, crn, crm, op2, rt64], [rt64, op1, crn, crm, op2])
1914 aarch64op(
"msr", [
bs(
'1101010100'),
bs(
'0'),
bs(
'1'),
bs(
'1'), op1, crn, crm, op2, rt64], [op1, crn, crm, op2, rt64])
1917 aarch64op(
"stxr", [
bs(
'1'), sf,
bs(
'001000'),
bs(
'0'),
bs(
'0'),
bs(
'0'), rs32,
bs(
'0'),
bs(
'11111'), rn64_deref_nooff, rt], [rs32, rt, rn64_deref_nooff])
1918 aarch64op(
"ldxr", [
bs(
'1'), sf,
bs(
'001000'),
bs(
'0'),
bs(
'1'),
bs(
'0'),
bs(
'11111'),
bs(
'0'),
bs(
'11111'), rn64_deref_nooff, rt], [rt, rn64_deref_nooff])
1921 aarch64op(
"stxrb", [
bs(
'0'),
bs(
'0'),
bs(
'001000'),
bs(
'0'),
bs(
'0'),
bs(
'0'), rs32,
bs(
'0'),
bs(
'11111'), rn64_deref_nooff, rt32], [rs32, rt32, rn64_deref_nooff])
1922 aarch64op(
"ldxrb", [
bs(
'0'),
bs(
'0'),
bs(
'001000'),
bs(
'0'),
bs(
'1'),
bs(
'0'),
bs(
'11111'),
bs(
'0'),
bs(
'11111'), rn64_deref_nooff, rt32], [rt32, rn64_deref_nooff])
1924 aarch64op(
"stxrb", [
bs(
'0'),
bs(
'1'),
bs(
'001000'),
bs(
'0'),
bs(
'0'),
bs(
'0'), rs32,
bs(
'0'),
bs(
'11111'), rn64_deref_nooff, rt32], [rs32, rt32, rn64_deref_nooff])
1925 aarch64op(
"ldxrh", [
bs(
'0'),
bs(
'1'),
bs(
'001000'),
bs(
'0'),
bs(
'1'),
bs(
'0'),
bs(
'11111'),
bs(
'0'),
bs(
'11111'), rn64_deref_nooff, rt32], [rt32, rn64_deref_nooff])
1927 aarch64op(
"stxp", [
bs(
'1'), sf,
bs(
'001000'),
bs(
'0'),
bs(
'0'),
bs(
'1'), rs32,
bs(
'0'), rt2, rn64_deref_nooff, rt], [rs32, rt, rt2, rn64_deref_nooff])
1928 aarch64op(
"ldxp", [
bs(
'1'), sf,
bs(
'001000'),
bs(
'0'),
bs(
'1'),
bs(
'1'),
bs(
'11111'),
bs(
'0'), rt2, rn64_deref_nooff, rt], [rt, rt2, rn64_deref_nooff])
1931 aarch64op(
"ldar", [
bs(
'1'), sf,
bs(
'001000'),
bs(
'1'),
bs(
'1'),
bs(
'0'),
bs(
'11111'),
bs(
'1'),
bs(
'11111'), rn64_deref_nooff, rt], [rt, rn64_deref_nooff])
1932 aarch64op(
"ldarb",[
bs(
'0'),
bs(
'0'),
bs(
'001000'),
bs(
'1'),
bs(
'1'),
bs(
'0'),
bs(
'11111'),
bs(
'1'),
bs(
'11111'), rn64_deref_nooff, rt], [rt, rn64_deref_nooff])
1933 aarch64op(
"ldarh",[
bs(
'0'),
bs(
'1'),
bs(
'001000'),
bs(
'0'),
bs(
'1'),
bs(
'0'),
bs(
'11111'),
bs(
'1'),
bs(
'11111'), rn64_deref_nooff, rt], [rt, rn64_deref_nooff])
1934 aarch64op(
"ldaxp",[
bs(
'1'), sf,
bs(
'001000'),
bs(
'0'),
bs(
'1'),
bs(
'1'),
bs(
'11111'),
bs(
'1'),
bs(
'11111'), rn64_deref_nooff, rt], [rt, rn64_deref_nooff])
1935 aarch64op(
"ldaxr",[
bs(
'1'), sf,
bs(
'001000'),
bs(
'0'),
bs(
'1'),
bs(
'0'),
bs(
'11111'),
bs(
'1'),
bs(
'11111'), rn64_deref_nooff, rt], [rt, rn64_deref_nooff])
1937 aarch64op(
"stlxr", [
bs(
'1'), sf,
bs(
'001000'),
bs(
'0'),
bs(
'0'),
bs(
'0'), rs32,
bs(
'1'),
bs(
'11111'), rn64_deref_nooff, rt], [rs32, rt, rn64_deref_nooff])
1938 aarch64op(
"stlxrb",[
bs(
'0'),
bs(
'0'),
bs(
'001000'),
bs(
'0'),
bs(
'0'),
bs(
'0'), rs32,
bs(
'1'),
bs(
'11111'), rn64_deref_nooff, rt32], [rs32, rt32, rn64_deref_nooff])
1939 aarch64op(
"stlxrh",[
bs(
'0'),
bs(
'1'),
bs(
'001000'),
bs(
'0'),
bs(
'0'),
bs(
'0'), rs32,
bs(
'1'),
bs(
'11111'), rn64_deref_nooff, rt32], [rs32, rt32, rn64_deref_nooff])
1940 aarch64op(
"stlxp", [
bs(
'1'), sf,
bs(
'001000'),
bs(
'0'),
bs(
'0'),
bs(
'1'), rs32,
bs(
'1'), rt2, rn64_deref_nooff, rt], [rs32, rt, rt2, rn64_deref_nooff])
1943 aarch64op(
"dsb", [
bs(
'1101010100'),
bs(
'0000110011'), crm,
bs(
'1'),
bs(
'00'),
bs(
'11111')], [crm])
1944 aarch64op(
"dmb", [
bs(
'1101010100'),
bs(
'0000110011'), crm,
bs(
'1'),
bs(
'01'),
bs(
'11111')], [crm])
1945 aarch64op(
"isb", [
bs(
'1101010100'),
bs(
'0000110011'), crm,
bs(
'1'),
bs(
'10'),
bs(
'11111')], [crm])
def mnemo_flow_to_dst_index
def op_shift2expr_slice_at