5 from pyparsing
import *
8 from collections
import defaultdict
16 log = logging.getLogger(
"armdis")
17 console_handler = logging.StreamHandler()
18 console_handler.setFormatter(logging.Formatter(
"%(levelname)-5s: %(message)s"))
19 log.addHandler(console_handler)
20 log.setLevel(logging.DEBUG)
28 regs_str = [
'R%d' % r
for r
in xrange(0x10)]
32 regs_expr = [
ExprId(x, 32)
for x
in regs_str]
36 gpregs_pc =
reg_info(regs_str[-1:], regs_expr[-1:])
37 gpregs_sp =
reg_info(regs_str[13:14], regs_expr[13:14])
39 gpregs_nosppc =
reg_info(regs_str[:13] + [str(reg_dum), regs_str[14]],
40 regs_expr[:13] + [reg_dum, regs_expr[14]])
47 for i
in xrange(0x10):
52 cpsr_regs_str.append(
"CPSR_%s" % o)
53 spsr_regs_str.append(
"SPSR_%s" % o)
60 cpsr_regs_expr = [
ExprId(x, 32)
for x
in cpsr_regs_str]
61 spsr_regs_expr = [
ExprId(x, 32)
for x
in spsr_regs_str]
63 cpsr_regs =
reg_info(cpsr_regs_str, cpsr_regs_expr)
64 spsr_regs =
reg_info(spsr_regs_str, spsr_regs_expr)
67 cpregs_str = [
'c%d' % r
for r
in xrange(0x10)]
68 cpregs_expr = [
ExprId(x)
for x
in cpregs_str]
73 pregs_str = [
'p%d' % r
for r
in xrange(0x10)]
74 pregs_expr = [
ExprId(x)
for x
in pregs_str]
78 conditional_branch = [
"BEQ",
"BNE",
"BCS",
"BCC",
"BMI",
"BPL",
"BVS",
79 "BVC",
"BHI",
"BLS",
"BGE",
"BLT",
"BGT",
"BLE"]
81 unconditional_branch = [
"B",
"BX",
"BL",
"BLX"]
87 i1 = gpregs.expr.index(t[0])
88 i2 = gpregs.expr.index(t[1])
90 for i
in xrange(i1, i2 + 1):
91 o.append(gpregs.expr[i])
94 LPARENTHESIS = Literal(
"(")
95 RPARENTHESIS = Literal(
")")
97 LACC = Suppress(Literal(
"{"))
98 RACC = Suppress(Literal(
"}"))
99 MINUS = Suppress(Literal(
"-"))
100 CIRCUNFLEX = Literal(
"^")
104 if left_bound <= value
and value <= right_bound:
107 raise ValueError(
'shift operator immediate value out of bound')
109 int_1_31 = str_int.copy().setParseAction(
lambda v:
check_bounds(1, 31, v[0]))
110 int_1_32 = str_int.copy().setParseAction(
lambda v:
check_bounds(1, 32, v[0]))
117 return ExprOp(
'reglist', *t)
120 allshifts = [
'<<',
'>>',
'a>>',
'>>>',
'rrx']
121 allshifts_armt = [
'<<',
'>>',
'a>>',
'>>>',
'rrx']
123 shift2expr_dct = {
'LSL':
'<<',
'LSR':
'>>',
'ASR':
'a>>',
124 'ROR':
">>>",
'RRX':
"rrx"}
126 expr2shift_dct = dict([(x[1], x[0])
for x
in shift2expr_dct.items()])
130 return shift2expr_dct[t[0]]
132 reg_duo = Group(gpregs.parser + MINUS +
133 gpregs.parser).setParseAction(tok_reg_duo)
134 reg_or_duo = reg_duo | gpregs.parser
135 gpreg_list = Group(LACC + delimitedList(
136 reg_or_duo, delim=
',') + RACC + Optional(CIRCUNFLEX))
137 gpreg_list.setParseAction(reglistparse)
139 LBRACK = Suppress(
"[")
140 RBRACK = Suppress(
"]")
141 COMMA = Suppress(
",")
143 [
'LSL',
'ROR']).setParseAction(op_shift2expr)
145 [
'LSR',
'ASR']).setParseAction(op_shift2expr)
146 all_unaryop_shifts_t =
literal_list([
'RRX']).setParseAction(op_shift2expr)
149 [
'LSL',
'LSR',
'ASR',
'ROR',
'RRX']).setParseAction(op_shift2expr)
151 gpreg_p = gpregs.parser
153 psr_p = cpsr_regs.parser | spsr_regs.parser
162 return ExprOp(t[1], t[0], t[2])
166 int_or_expr = base_expr
170 if not t
in mn_arm.regs.all_regs_ids_byname:
173 r = mn_arm.regs.all_regs_ids_byname[t]
182 base_expr.setParseAction(my_var_parser)
185 shift_off = (gpregs.parser + Optional(
186 (all_unaryop_shifts_t) |
187 (all_binaryop_1_31_shifts_t + (gpregs.parser | int_1_31)) |
188 (all_binaryop_1_32_shifts_t + (gpregs.parser | int_1_32))
189 )).setParseAction(shift2expr)
190 shift_off |= base_expr
204 return ExprOp(
"preinc", t[0], t[1])
206 raise NotImplementedError(
'len(t) > 2')
216 raise NotImplementedError(
'len(t) > 2')
221 return ExprOp(
"postinc", t[0], t[1])
232 LBRACK + gpregs.parser + RBRACK).setParseAction(deref2expr_nooff)
233 deref_pre = Group(LBRACK + gpregs.parser + Optional(
234 COMMA + shift_off) + RBRACK).setParseAction(deref2expr_pre)
235 deref_post = Group(LBRACK + gpregs.parser + RBRACK +
236 COMMA + shift_off).setParseAction(deref2expr_post)
237 deref = Group((deref_post | deref_pre | deref_nooff)
238 + Optional(
'!')).setParseAction(deref_wb)
244 return ExprOp(
'wback', *t[:-1])
247 gpregs_wb = Group(gpregs.parser + Optional(
'!')).setParseAction(parsegpreg_wb)
253 cond_list = [
'EQ',
'NE',
'CS',
'CC',
'MI',
'PL',
'VS',
'VC',
254 'HI',
'LS',
'GE',
'LT',
'GT',
'LE',
'']
255 cond_dct = dict([(x[1], x[0])
for x
in enumerate(cond_list)])
263 for i, x
in enumerate(order):
264 l.append((x.__class__, i))
266 out = [
None for x
in xrange(len(args))]
268 out[l[a.__class__]] = a
284 super(instruction_arm, self).
__init__(*args, **kargs)
289 if isinstance(e, ExprId)
or isinstance(e, ExprInt):
291 if isinstance(e, ExprOp)
and e.op
in expr2shift_dct:
293 return '%s %s' % (e.args[0], expr2shift_dct[e.op])
294 elif len(e.args) == 2:
295 return '%s %s %s' % (e.args[0], expr2shift_dct[e.op], e.args[1])
297 raise NotImplementedError(
'zarb arg2str')
301 if isinstance(e, ExprOp)
and e.op ==
"sbit":
304 if isinstance(e, ExprOp)
and e.op ==
"reglist":
305 o = [gpregs.expr.index(x)
for x
in e.args]
312 if isinstance(e, ExprOp)
and e.op ==
'wback':
315 if isinstance(e, ExprId):
321 if not isinstance(e, ExprMem):
325 if isinstance(e, ExprOp)
and e.op ==
'wback':
330 if isinstance(e, ExprId):
332 elif len(e.args) == 1
and isinstance(e.args[0], ExprId):
333 r, s = e.args[0],
None
334 elif isinstance(e.args[0], ExprId):
335 r, s = e.args[0], e.args[1]
337 r, s = e.args[0].args
338 if isinstance(s, ExprOp)
and s.op
in expr2shift_dct:
340 for x
in s.args[0], expr2shift_dct[s.op], s.args[1]])
342 if isinstance(e, ExprOp)
and e.op ==
'postinc':
344 if s
and not (isinstance(s, ExprInt)
and s.arg == 0):
347 if s
and not (isinstance(s, ExprInt)
and s.arg == 0):
348 o =
'[%s, %s]' % (r, s)
359 return self.
name in conditional_branch + unconditional_branch
363 if not isinstance(e, ExprInt):
366 ad = e.arg + self.offset
368 ad = e.arg + self.offset
369 l = symbol_pool.getby_offset_create(ad)
374 if self.
name in conditional_branch + unconditional_branch:
376 if self.name.startswith(
"LDM")
and PC
in self.
args[1].args:
378 if self.
args and PC
in self.
args[0].get_r():
383 if self.
name ==
'BLX':
385 return self.additional_info.lnk
388 return [self.
args[0]]
391 if self.additional_info.lnk:
393 if self.
name ==
'BLX':
395 if self.
name ==
'BX':
397 return self.
breakflow()
and self.additional_info.cond != 14
404 if self.offset
is None:
405 raise ValueError(
'symbol not resolved %s' % l)
406 if not isinstance(e, ExprInt):
407 log.debug(
'dyn dst %r', e)
409 off = e.arg - self.offset
411 raise ValueError(
'strange offset! %r' % off)
415 args = [a
for a
in self.
args]
425 super(instruction_armt, self).
__init__(*args, **kargs)
428 if self.
name in [
"CBZ",
"CBNZ"]:
430 return self.
name in conditional_branch + unconditional_branch
433 if self.
name in [
"CBZ",
"CBNZ"]:
437 if not isinstance(e, ExprInt):
440 ad = e.arg + (self.offset & 0xfffffffc)
442 ad = e.arg + self.offset
443 l = symbol_pool.getby_offset_create(ad)
445 if self.
name in [
"CBZ",
"CBNZ"]:
451 if self.
name in conditional_branch + unconditional_branch +[
"CBZ",
"CBNZ"]:
453 if self.name.startswith(
"LDM")
and PC
in self.
args[1].args:
455 if self.
args and PC
in self.
args[0].get_r():
460 if self.
name in [
'CBZ',
'CBNZ']:
461 return [self.
args[1]]
462 return [self.
args[0]]
465 if self.
name in conditional_branch + [
'BL',
'BLX',
'CBZ',
'CBNZ']:
470 return self.
name in [
'BL',
'BLX']
474 if self.offset
is None:
475 raise ValueError(
'symbol not resolved %s' % l)
476 if not isinstance(e, ExprInt):
477 log.debug(
'dyn dst %r', e)
482 off = e.arg - self.offset
484 raise ValueError(
'strange offset! %r' % off)
489 new_offset = ((self.offset+self.l)/4)*4
500 all_mn_mode = defaultdict(list)
501 all_mn_name = defaultdict(list)
502 all_mn_inst = defaultdict(list)
503 pc = {
'l':PC,
'b':PC}
504 sp = {
'l':SP,
'b':SP}
505 instruction = instruction_arm
506 max_instruction_len = 4
520 if hasattr(self,
"lnk"):
521 info.lnk = self.lnk.value != 0
522 info.cond = self.cond.value
530 if n > bs.getlen() * 8:
531 raise ValueError(
'not enought bits %r %r' % (n, len(bs.bin) * 8))
534 n_offset = cls.endian_offset(attrib, offset)
535 c = cls.getbytes(bs, n_offset, 1)
552 return (offset & ~3) + 3 - offset % 4
556 raise NotImplementedError(
'bad attrib')
560 l = sum([x.l
for x
in fields])
561 assert l == 32,
"len %r" % l
569 l = sum([x.l
for x
in fields])
572 return [bm_cond] + fields
577 return [(subcls, name, bases, dct, fields)]
580 v = super(mn_arm, self).
value(mode)
582 return [x[::-1]
for x
in v]
584 return [x
for x
in v]
586 raise NotImplementedError(
'bad attrib')
600 all_mn_mode = defaultdict(list)
601 all_mn_name = defaultdict(list)
602 all_mn_inst = defaultdict(list)
605 instruction = instruction_armt
606 max_instruction_len = 4
620 if hasattr(self,
"lnk"):
621 info.lnk = self.lnk.value != 0
631 if n > bs.getlen() * 8:
632 raise ValueError(
'not enought bits %r %r' % (n, len(bs.bin) * 8))
635 n_offset = cls.endian_offset(attrib, offset)
636 c = cls.getbytes(bs, n_offset, 1)
653 return (offset & ~1) + 1 - offset % 2
657 raise NotImplementedError(
'bad attrib')
661 l = sum([x.l
for x
in fields])
662 assert l
in [16, 32],
"len %r" % l
675 return [(subcls, name, bases, dct, fields)]
678 v = super(mn_armt, self).
value(mode)
685 out.append(x[:2][::-1] + x[2:4][::-1])
688 return [x
for x
in v]
690 raise NotImplementedError(
'bad attrib')
693 args = [a.expr
for a
in self.
args]
704 class arm_gpreg_noarg(reg_noarg):
706 parser = reg_info.parser
711 parser = reg_info.parser
720 e = self.reg_info.expr[v]
721 if self.parent.wback.value:
728 self.parent.wback.value = 0
729 if isinstance(e, ExprOp)
and e.op ==
'wback':
730 self.parent.wback.value = 1
732 if isinstance(e, ExprId):
733 self.
value = self.reg_info.expr.index(e)
735 self.parent.wback.value = 1
736 self.
value = self.reg_info.expr.index(e.args[0])
745 if self.parent.psr.value == 0:
746 e = cpsr_regs.expr[v]
748 e = spsr_regs.expr[v]
754 if e
in spsr_regs.expr:
755 self.parent.psr.value = 1
756 v = spsr_regs.expr.index(e)
757 elif e
in cpsr_regs.expr:
758 self.parent.psr.value = 0
759 v = cpsr_regs.expr.index(e)
768 parser = reg_info.parser
773 parser = reg_info.parser
803 if (1 << (self.l - 1)) & v:
810 if not isinstance(self.
expr, ExprInt):
812 v = int(self.expr.arg)
813 if (1 << (self.l - 1)) & v:
814 v = -((0xffffffff ^ v) + 1)
816 self.
value = (v & 0xffffffff) & self.lmask
825 if self.parent.updown.value:
829 if self.parent.ppi.value:
830 e =
ExprOp(
'preinc', self.parent.rn.expr, e)
832 e =
ExprOp(
'postinc', self.parent.rn.expr, e)
833 if self.parent.wback.value == 1:
839 self.parent.updown.value = 1
841 if not isinstance(e, ExprMem):
844 if isinstance(e, ExprOp)
and e.op ==
'wback':
845 self.parent.wback.value = 1
848 self.parent.wback.value = 0
849 if e.op ==
"postinc":
850 self.parent.ppi.value = 0
851 elif e.op ==
"preinc":
852 self.parent.ppi.value = 1
855 self.parent.ppi.value = 1
856 self.parent.rn.expr = e.args[0]
861 if not isinstance(e, ExprInt):
862 log.debug(
'should be int %r', e)
865 if v < 0
or v & (1 << 31):
866 self.parent.updown.value = 0
869 log.debug(
'arg should be 4 aligned')
881 imm = (self.parent.imm4.value << 12) | v
886 if not isinstance(self.
expr, ExprInt):
888 v = int(self.expr.arg)
891 self.parent.imm4.value = v >> 12
902 for i
in xrange(0, 32, 2):
905 return ((i / 2) << 8) | v
910 if self.parent.immop.value:
918 shift_kind = shift & 1
919 shift_type = (shift >> 1) & 3
932 shift_op = regs_expr[rs]
944 self.
expr =
ExprOp(allshifts[shift_type], a, shift_op)
950 if isinstance(e, ExprInt):
954 self.parent.immop.value = 1
958 self.parent.immop.value = 0
960 if isinstance(e, ExprId):
961 rm = gpregs.expr.index(e)
966 ((((amount << 2) | shift_type) << 1) | shift_kind) << 4) | rm
969 if not isinstance(e, ExprOp):
970 log.debug(
'bad reg rot1 %r', e)
972 rm = gpregs.expr.index(e.args[0])
973 shift_type = allshifts.index(e.op)
978 elif isinstance(e.args[1], ExprInt):
980 amount = int(e.args[1].arg)
982 if amount == 32
and e.op
in [
'>>',
'a>>']:
986 amount = gpregs.expr.index(e.args[1]) << 1
988 ((((amount << 2) | shift_type) << 1) | shift_kind) << 4) | rm
1000 if 0 <= s < (1 << 12):
1005 val = v & self.lmask
1006 if self.parent.immop.value == 0:
1008 if self.parent.updown.value == 0:
1010 if self.parent.ppi.value:
1014 if self.parent.wback.value == 1:
1020 shift_kind = shift & 1
1021 shift_type = (shift >> 1) & 3
1036 a =
ExprOp(allshifts[shift_type], a, shift_op)
1037 if self.parent.ppi.value:
1038 e =
ExprOp(
'preinc', self.parent.rn.expr, a)
1040 e =
ExprOp(
'postinc', self.parent.rn.expr, a)
1041 if self.parent.wback.value == 1:
1047 self.parent.immop.value = 1
1048 self.parent.updown.value = 1
1051 assert(isinstance(e, ExprMem))
1054 self.parent.wback.value = 1
1057 self.parent.wback.value = 0
1058 if e.op ==
"postinc":
1059 self.parent.ppi.value = 0
1060 elif e.op ==
"preinc":
1061 self.parent.ppi.value = 1
1064 self.parent.ppi.value = 1
1068 self.parent.rn.fromstring(e.args[0])
1069 if len(e.args) == 1:
1070 self.parent.immop.value = 0
1074 if isinstance(e.args[1], ExprInt):
1075 self.parent.immop.value = 0
1080 log.debug(
'cannot encode inm')
1082 self.parent.updown.value = 0
1086 if isinstance(e.args[1], ExprId):
1087 rm = gpregs.expr.index(e.args[1])
1092 ((((amount << 2) | shift_type) << 1) | shift_kind) << 4) | rm
1095 if not isinstance(e.args[1], ExprOp):
1096 log.debug(
'bad reg rot2 %r', e)
1099 rm = gpregs.expr.index(e.args[0])
1100 shift_type = allshifts.index(e.op)
1101 if isinstance(e.args[1], ExprInt):
1103 amount = int(e.args[1].arg)
1106 amount = gpregs.expr.index(e.args[1]) << 1
1108 ((((amount << 2) | shift_type) << 1) | shift_kind) << 4) | rm
1115 while i < len(rlist):
1117 while j < len(rlist)
and rlist[j] < 13
and rlist[j] == rlist[j - 1] + 1:
1121 out.append(regs_str[rlist[i]])
1124 out.append(regs_str[rlist[i]] +
'-' + regs_str[rlist[j]])
1126 return "{" +
", ".join(out) +
'}'
1133 self.parent.sbit.value = 0
1135 if isinstance(e, ExprOp)
and e.op ==
"sbit":
1137 self.parent.sbit.value = 1
1138 rlist = [gpregs.expr.index(x)
for x
in e.args]
1148 for i
in xrange(0x10):
1150 out.append(gpregs.expr[i])
1153 e =
ExprOp(
'reglist', *out)
1154 if self.parent.sbit.value == 1:
1164 return name + self.
args[
'mn_mod'][f_i]
1176 if name.startswith(
"STM"):
1178 return name + self.
args[
'mn_mod'][f_i]
1185 if name.startswith(
"STM"):
1187 return name + self.
args[
'mn_mod'][f_i]
1196 e = self.reg_info.expr[v]
1197 if self.parent.wback.value:
1207 v = (v << 2) + (self.parent.lowb.value << 1)
1215 if not isinstance(self.
expr, ExprInt):
1218 v = int(self.expr.arg - 8)
1221 self.parent.lowb.value = (v >> 1) & 1
1229 return name[:1] + self.
args[
'mn_mod'][i] + name[1:]
1235 rd =
bs(l=4, cls=(arm_gpreg,))
1236 rdl =
bs(l=4, cls=(arm_gpreg,))
1238 rn =
bs(l=4, cls=(arm_gpreg,), fname=
"rn")
1239 rs =
bs(l=4, cls=(arm_gpreg,))
1240 rm =
bs(l=4, cls=(arm_gpreg,))
1241 op2 =
bs(l=12, cls=(arm_op2,))
1242 lnk =
bs_lnk(l=1, fname=
'lnk', mn_mod=[
'',
'L'])
1243 offs =
bs(l=24, cls=(arm_offs,), fname=
"offs")
1245 rn_noarg =
bs(l=4, cls=(arm_gpreg_noarg,), fname=
"rn")
1246 rm_noarg =
bs(l=4, cls=(arm_gpreg_noarg,), fname=
"rm", order = -1)
1248 immop =
bs(l=1, fname=
'immop')
1249 dumr =
bs(l=4, default_val=
"0000", fname=
"dumr")
1252 psr =
bs(l=1, fname=
"psr")
1253 psr_field =
bs(l=4, cls=(arm_psr,))
1255 ppi =
bs(l=1, fname=
'ppi')
1256 updown =
bs(l=1, fname=
'updown')
1259 wback_no_t =
bs(l=1, fname=
"wback")
1261 op2imm =
bs(l=12, cls=(arm_op2imm,))
1268 sbit =
bs(l=1, fname=
"sbit")
1269 rn_sp =
bs(
"1101", cls=(arm_reg_wb,), fname=
'rnsp')
1270 rn_wb =
bs(l=4, cls=(arm_reg_wb_nosp,), fname=
'rn')
1271 rlist =
bs(l=16, cls=(arm_rlist,), fname=
'rlist')
1273 swi_i =
bs(l=24, cls=(arm_imm,), fname=
"swi_i")
1275 opc =
bs(l=4, cls=(arm_imm, m_arg), fname=
'opc')
1276 crn =
bs(l=4, cls=(arm_cpreg,), fname=
'crn')
1277 crd =
bs(l=4, cls=(arm_cpreg,), fname=
'crd')
1278 crm =
bs(l=4, cls=(arm_cpreg,), fname=
'crm')
1279 cpnum =
bs(l=4, cls=(arm_preg,), fname=
'cpnum')
1280 cp =
bs(l=3, cls=(arm_imm, m_arg), fname=
'cp')
1282 imm8_12 =
bs(l=8, cls=(arm_imm8_12, m_arg), fname=
'imm')
1285 cpopc =
bs(l=3, cls=(arm_imm, m_arg), fname=
'cpopc')
1286 imm20 =
bs(l=20, cls=(arm_imm, m_arg))
1287 imm4 =
bs(l=4, cls=(arm_imm, m_arg))
1288 imm12 =
bs(l=12, cls=(arm_imm, m_arg))
1289 imm16 =
bs(l=16, cls=(arm_imm, m_arg))
1291 imm4_noarg =
bs(l=4, fname=
"imm4")
1293 imm_4_12 =
bs(l=12, cls=(arm_imm_4_12,))
1295 lowb =
bs(l=1, fname=
'lowb')
1296 offs_blx =
bs(l=24, cls=(arm_offs_blx,), fname=
"offs")
1298 fix_cond =
bs(
"1111", fname=
"cond")
1315 if self.parent.immop.value == 1:
1316 imm =
ExprInt32((self.parent.immedH.value << 4) | v)
1318 imm = gpregs.expr[v]
1319 if self.parent.updown.value == 0:
1321 if self.parent.ppi.value:
1322 e =
ExprOp(
'preinc', self.parent.rn.expr, imm)
1324 e =
ExprOp(
'postinc', self.parent.rn.expr, imm)
1325 if self.parent.wback.value == 1:
1332 self.parent.immop.value = 1
1333 self.parent.updown.value = 1
1335 if not isinstance(e, ExprMem):
1338 if isinstance(e, ExprOp)
and e.op ==
'wback':
1339 self.parent.wback.value = 1
1342 self.parent.wback.value = 0
1343 if e.op ==
"postinc":
1344 self.parent.ppi.value = 0
1345 elif e.op ==
"preinc":
1346 self.parent.ppi.value = 1
1349 self.parent.ppi.value = 1
1350 self.parent.rn.expr = e.args[0]
1351 if len(e.args) == 1:
1353 self.parent.immedH.value = 0
1356 if isinstance(e, ExprInt):
1358 if v < 0
or v & (1 << 31):
1359 self.parent.updown.value = 0
1360 v = (-v) & 0xFFFFFFFF
1362 log.debug(
'cannot encode imm XXX')
1364 self.
value = v & 0xF
1365 self.parent.immedH.value = v >> 4
1368 self.parent.immop.value = 0
1369 if isinstance(e, ExprOp)
and len(e.args) == 1
and e.op ==
"-":
1370 self.parent.updown.value = 0
1372 if e
in gpregs.expr:
1373 self.
value = gpregs.expr.index(e)
1374 self.parent.immedH.value = 0x0
1377 raise ValueError(
'e should be int: %r' % e)
1379 immedH =
bs(l=4, fname=
'immedH')
1380 immedL =
bs(l=4, cls=(arm_immed, m_arg), fname=
'immedL')
1387 r = self.parent.rm.expr
1391 raise NotImplementedError(
'rotation')
1396 if isinstance(e, ExprId):
1399 raise NotImplementedError(
'rotation')
1402 rot_rm =
bs(l=2, cls=(armt2_rot_rm,), fname=
"rot_rm")
1405 def armop(name, fields, args=None, alias=False):
1406 dct = {
"fields": fields}
1407 dct[
"alias"] = alias
1408 if args
is not None:
1410 type(name, (mn_arm,), dct)
1413 def armtop(name, fields, args=None, alias=False):
1414 dct = {
"fields": fields}
1415 dct[
"alias"] = alias
1416 if args
is not None:
1418 type(name, (mn_armt,), dct)
1421 op_list = [
'AND',
'EOR',
'SUB',
'RSB',
'ADD',
'ADC',
'SBC',
'RSC',
1422 'TST',
'TEQ',
'CMP',
'CMN',
'ORR',
'MOV',
'BIC',
'MVN']
1423 data_mov_name = {
'MOV': 13,
'MVN': 15}
1424 data_test_name = {
'TST': 8,
'TEQ': 9,
'CMP': 10,
'CMN': 11}
1427 for i, n
in enumerate(op_list):
1428 if n
in data_mov_name.keys() + data_test_name.keys():
1433 bs_data_mov_name =
bs_name(l=4, name=data_mov_name)
1435 bs_data_test_name =
bs_name(l=4, name=data_test_name)
1438 transfer_name = {
'STR': 0,
'LDR': 1}
1439 bs_transfer_name =
bs_name(l=1, name=transfer_name)
1441 transferh_name = {
'STRH': 0,
'LDRH': 1}
1442 bs_transferh_name =
bs_name(l=1, name=transferh_name)
1445 transfer_ldr_name = {
'LDRD': 0,
'LDRSB': 1}
1446 bs_transfer_ldr_name =
bs_name(l=1, name=transfer_ldr_name)
1448 btransfer_name = {
'STM': 0,
'LDM': 1}
1449 bs_btransfer_name =
bs_name(l=1, name=btransfer_name)
1451 ctransfer_name = {
'STC': 0,
'LDC': 1}
1452 bs_ctransfer_name =
bs_name(l=1, name=ctransfer_name)
1454 mr_name = {
'MCR': 0,
'MRC': 1}
1457 armop(
"mul", [
bs(
'000000'),
bs(
'0'), scc, rd,
1458 bs(
'0000'), rs,
bs(
'1001'), rm], [rd, rm, rs])
1460 bs(
'0'), scc, rd, rdl, rs,
bs(
'1001'), rm], [rdl, rd, rm, rs])
1462 bs(
'1'), scc, rd, rdl, rs,
bs(
'1001'), rm], [rdl, rd, rm, rs])
1463 armop(
"smull", [
bs(
'000011'),
bs(
'0'), scc, rd,
1464 rdl, rs,
bs(
'1001'), rm], [rdl, rd, rm, rs])
1465 armop(
"smlal", [
bs(
'000011'),
bs(
'1'), scc, rd,
1466 rdl, rs,
bs(
'1001'), rm], [rdl, rd, rm, rs])
1467 armop(
"mla", [
bs(
'000000'),
bs(
'1'), scc, rd,
1468 rn, rs,
bs(
'1001'), rm], [rd, rm, rs, rn])
1469 armop(
"mrs", [
bs(
'00010'), psr,
bs(
'00'),
1470 psr_field, rd,
bs(
'000000000000')], [rd, psr])
1471 armop(
"msr", [
bs(
'00010'), psr,
bs(
'10'), psr_field,
1472 bs(
'1111'),
bs(
'0000'),
bs(
'0000'), rm], [psr_field, rm])
1473 armop(
"data", [
bs(
'00'), immop, bs_data_name, scc, rn, rd, op2], [rd, rn, op2])
1475 [
bs(
'00'), immop, bs_data_mov_name, scc,
bs(
'0000'), rd, op2], [rd, op2])
1476 armop(
"data_test", [
bs(
'00'), immop, bs_data_test_name, dumscc, rn, dumr, op2])
1477 armop(
"b", [
bs(
'101'), lnk, offs])
1479 armop(
"smul", [
bs(
'00010110'), rd,
bs(
'0000'), rs,
bs(
'1'), mul_y, mul_x,
bs(
'0'), rm], [rd, rm, rs])
1483 armop(
"transfer", [
bs(
'01'), immop, ppi, updown, trb, wback_no_t,
1484 bs_transfer_name, rn_noarg, rd, op2imm], [rd, op2imm])
1485 armop(
"transferh", [
bs(
'000'), ppi, updown, immop, wback_no_t,
1486 bs_transferh_name, rn_noarg, rd, immedH,
bs(
'1011'), immedL], [rd, immedL])
1487 armop(
"ldrd", [
bs(
'000'), ppi, updown, immop, wback_no_t, bs_transfer_ldr_name,
1488 rn_noarg, rd, immedH,
bs(
'1101'), immedL], [rd, immedL])
1489 armop(
"ldrsh", [
bs(
'000'), ppi, updown, immop, wback_no_t,
bs(
'1'), rn_noarg,
1490 rd, immedH,
bs(
'1'),
bs(
'1'),
bs(
'1'),
bs(
'1'), immedL], [rd, immedL])
1491 armop(
"strd", [
bs(
'000'), ppi, updown, immop, wback_no_t,
bs(
'0'), rn_noarg,
1492 rd, immedH,
bs(
'1'),
bs(
'1'),
bs(
'1'),
bs(
'1'), immedL], [rd, immedL])
1493 armop(
"btransfersp", [
bs(
'100'), ppi_b_sp, updown_b_sp, sbit, wback_no_t,
1494 bs_btransfer_name, rn_sp, rlist])
1495 armop(
"btransfer", [
bs(
'100'), ppi_b_nosp, updown_b_nosp, sbit, wback_no_t,
1496 bs_btransfer_name, rn_wb, rlist])
1498 armop(
"swp", [
bs(
'00010'), trb,
bs(
'00'), rn, rd,
bs(
'0000'),
bs(
'1001'), rm])
1499 armop(
"svc", [
bs(
'1111'), swi_i])
1500 armop(
"cdp", [
bs(
'1110'), opc, crn, crd, cpnum, cp,
bs(
'0'), crm],
1501 [cpnum, opc, crd, crn, crm, cp])
1502 armop(
"cdata", [
bs(
'110'), ppi, updown, tl, wback_no_t, bs_ctransfer_name,
1503 rn_noarg, crd, cpnum, imm8_12], [cpnum, crd, imm8_12])
1504 armop(
"mr", [
bs(
'1110'), cpopc, bs_mr_name, crn, rd, cpnum, cp,
bs(
'1'), crm],
1505 [cpnum, cpopc, rd, crn, crm, cp])
1506 armop(
"bkpt", [
bs(
'00010010'), imm12,
bs(
'0111'), imm4])
1507 armop(
"bx", [
bs(
'000100101111111111110001'), rn])
1508 armop(
"mov", [
bs(
'00110000'), imm4_noarg, rd, imm_4_12], [rd, imm_4_12])
1509 armop(
"movt", [
bs(
'00110100'), imm4_noarg, rd, imm_4_12], [rd, imm_4_12])
1510 armop(
"blx", [
bs(
'00010010'),
bs(
'1111'),
1511 bs(
'1111'),
bs(
'1111'),
bs(
'0011'), rm], [rm])
1512 armop(
"blx", [fix_cond,
bs(
'101'), lowb, offs_blx], [offs_blx])
1513 armop(
"clz", [
bs(
'00010110'),
bs(
'1111'),
1514 rd,
bs(
'1111'),
bs(
'0001'), rm], [rd, rm])
1516 [
bs(
'00010000'), rn, rd,
bs(
'0000'),
bs(
'0101'), rm], [rd, rm, rn])
1518 armop(
"uxtb", [
bs(
'01101110'),
bs(
'1111'), rd, rot_rm,
bs(
'00'),
bs(
'0111'), rm_noarg])
1519 armop(
"uxth", [
bs(
'01101111'),
bs(
'1111'), rd, rot_rm,
bs(
'00'),
bs(
'0111'), rm_noarg])
1520 armop(
"sxtb", [
bs(
'01101010'),
bs(
'1111'), rd, rot_rm,
bs(
'00'),
bs(
'0111'), rm_noarg])
1521 armop(
"sxth", [
bs(
'01101011'),
bs(
'1111'), rd, rot_rm,
bs(
'00'),
bs(
'0111'), rm_noarg])
1523 armop(
"rev", [
bs(
'01101011'),
bs(
'1111'), rd,
bs(
'1111'),
bs(
'0011'), rm])
1531 if not isinstance(self.
expr, ExprInt):
1533 v = int(self.expr.arg) + -1
1538 widthm1 =
bs(l=5, cls=(arm_widthm1, m_arg))
1539 lsb =
bs(l=5, cls=(arm_imm, m_arg))
1541 armop(
"ubfx", [
bs(
'0111111'), widthm1, rd, lsb,
bs(
'101'), rn], [rd, rn, lsb, widthm1])
1543 armop(
"bfc", [
bs(
'0111110'), widthm1, rd, lsb,
bs(
'001'),
bs(
'1111')], [rd, lsb, widthm1])
1551 gpregs_sppc =
reg_info(regs_str[-1:] + regs_str[13:14],
1552 regs_expr[-1:] + regs_expr[13:14])
1554 deref_low = Group(LBRACK + gpregs_l.parser + Optional(
1555 COMMA + shift_off) + RBRACK).setParseAction(deref2expr_pre_mem)
1556 deref_pc = Group(LBRACK + gpregs_pc.parser + Optional(
1557 COMMA + shift_off) + RBRACK).setParseAction(deref2expr_pre_mem)
1558 deref_sp = Group(LBRACK + gpregs_sp.parser + COMMA +
1559 shift_off + RBRACK).setParseAction(deref2expr_pre_mem)
1561 gpregs_l_wb = Group(
1562 gpregs_l.parser + Optional(
'!')).setParseAction(parsegpreg_wb)
1580 self.
expr = self.off_reg
1583 if isinstance(e, ExprOp)
and e.op ==
'wback':
1584 self.parent.wback.value = 1
1590 if not (isinstance(e, ExprOp)
and e.op ==
"preinc"):
1591 log.debug(
'cannot encode %r', e)
1593 if e.args[0] != self.off_reg:
1594 log.debug(
'cannot encode reg %r', e.args[0])
1596 v = int(e.args[1].arg)
1603 off_reg = regs_expr[15]
1614 if isinstance(e, ExprOp)
and e.op ==
'wback':
1615 self.parent.wback.value = 1
1621 if not isinstance(e, ExprMem):
1624 if not (isinstance(e, ExprOp)
and e.op ==
"preinc"):
1625 log.debug(
'cannot encode %r', e)
1628 log.debug(
'cannot encode reg %r', e.args[0])
1630 v = int(e.args[1].arg)
1640 off_reg = regs_expr[13]
1682 rbase = regs_expr[v]
1683 e =
ExprOp(
'preinc', rbase, self.parent.off.expr)
1689 if not isinstance(e, ExprMem):
1692 if not (isinstance(e, ExprOp)
and e.op ==
'preinc'):
1693 log.debug(
'cannot encode %r', e)
1696 if isinstance(off, ExprId):
1697 self.parent.off.expr = off
1698 elif isinstance(off, ExprInt):
1699 self.parent.off.expr = off
1701 log.debug(
'cannot encode off %r', off)
1703 self.
value = gpregs.expr.index(e.args[0])
1704 if self.
value >= 1 << self.l:
1705 log.debug(
'cannot encode reg %r', off)
1714 if self.parent.trb.value == 0:
1720 if not isinstance(self.
expr, ExprInt):
1722 v = int(self.expr.arg)
1723 if self.parent.trb.value == 0:
1725 log.debug(
'off must be aligned %r', v)
1741 if not isinstance(self.
expr, ExprInt):
1743 v = int(self.expr.arg)
1745 log.debug(
'off must be aligned %r', v)
1757 rlist = [gpregs_l.expr.index(x)
for x
in e.args]
1767 for i
in xrange(0x10):
1769 out.append(gpregs.expr[i])
1772 e =
ExprOp(
'reglist', *out)
1781 reg_l = list(e.args)
1782 self.parent.pclr.value = 0
1783 if self.parent.pp.value == 0:
1785 if regs_expr[14]
in reg_l:
1786 reg_l.remove(regs_expr[14])
1787 self.parent.pclr.value = 1
1790 if regs_expr[15]
in reg_l:
1791 reg_l.remove(regs_expr[15])
1792 self.parent.pclr.value = 1
1793 rlist = [gpregs.expr.index(x)
for x
in reg_l]
1803 for i
in xrange(0x10):
1805 out.append(gpregs.expr[i])
1807 if self.parent.pclr.value == 1:
1808 if self.parent.pp.value == 0:
1809 out += [regs_expr[14]]
1811 out += [regs_expr[15]]
1814 e =
ExprOp(
'reglist', *out)
1821 parser = gpregs_l_wb
1825 e = self.reg_info.expr[v]
1826 if not e
in self.parent.trlist.expr.args:
1833 if isinstance(e, ExprOp):
1837 self.
value = self.reg_info.expr.index(e)
1843 parser = reg_info.parser
1848 parser = reg_info.parser
1853 parser = reg_info.parser
1857 reg_info = gpregs_sppc
1858 parser = reg_info.parser
1862 reg_info = gpregs_sp
1863 parser = reg_info.parser
1866 off5 =
bs(l=5, cls=(arm_imm,), fname=
"off")
1867 off3 =
bs(l=3, cls=(arm_imm,), fname=
"off")
1868 off8 =
bs(l=8, cls=(arm_imm,), fname=
"off")
1869 off7 =
bs(l=7, cls=(arm_off7,), fname=
"off")
1871 rdl =
bs(l=3, cls=(arm_gpreg_l,), fname=
"rd")
1872 rnl =
bs(l=3, cls=(arm_gpreg_l,), fname=
"rn")
1873 rsl =
bs(l=3, cls=(arm_gpreg_l,), fname=
"rs")
1874 rml =
bs(l=3, cls=(arm_gpreg_l,), fname=
"rm")
1875 rol =
bs(l=3, cls=(arm_gpreg_l,), fname=
"ro")
1876 rbl =
bs(l=3, cls=(arm_gpreg_l,), fname=
"rb")
1877 rbl_deref =
bs(l=3, cls=(arm_deref,), fname=
"rb")
1878 dumrh =
bs(l=3, default_val=
"000")
1880 rdh =
bs(l=3, cls=(arm_gpreg_h,), fname=
"rd")
1881 rsh =
bs(l=3, cls=(arm_gpreg_h,), fname=
"rs")
1883 offpc8 =
bs(l=8, cls=(arm_offpc,), fname=
"offs")
1884 offsp8 =
bs(l=8, cls=(arm_offsp,), fname=
"offs")
1885 rol_noarg =
bs(l=3, cls=(arm_gpreg_l_noarg,), fname=
"off")
1887 off5bw =
bs(l=5, cls=(arm_offbw,), fname=
"off")
1888 off5h =
bs(l=5, cls=(arm_offh,), fname=
"off")
1889 sppc =
bs(l=1, cls=(arm_sppc,))
1892 pclr =
bs(l=1, fname=
'pclr')
1895 sp =
bs(l=0, cls=(arm_sp,))
1898 off8s =
bs(l=8, cls=(arm_offs,), fname=
"offs")
1899 trlistpclr =
bs(l=8, cls=(armt_rlist_pclr,))
1900 trlist =
bs(l=8, cls=(armt_rlist,), fname=
"trlist", order = -1)
1902 rbl_wb =
bs(l=3, cls=(armt_reg_wb,), fname=
'rb')
1904 offs8 =
bs(l=8, cls=(arm_offspc,), fname=
"offs")
1905 offs11 =
bs(l=11, cls=(arm_offspc,), fname=
"offs")
1907 hl =
bs(l=1, prio=default_prio + 1, fname=
'hl')
1908 off8sppc =
bs(l=8, cls=(arm_off8sppc,), fname=
"off")
1910 imm8_d1 =
bs(l=8, default_val=
"00000001")
1911 imm8 =
bs(l=8, cls=(arm_imm,), default_val =
"00000001")
1914 mshift_name = {
'LSLS': 0,
'LSRS': 1,
'ASRS': 2}
1918 addsub_name = {
'ADDS': 0,
'SUBS': 1}
1921 mov_cmp_add_sub_name = {
'MOVS': 0,
'CMP': 1,
'ADDS': 2,
'SUBS': 3}
1922 bs_mov_cmp_add_sub_name =
bs_name(l=2, name=mov_cmp_add_sub_name)
1924 alu_name = {
'ANDS': 0,
'EORS': 1,
'LSLS': 2,
'LSRS': 3,
1925 'ASRS': 4,
'ADCS': 5,
'SBCS': 6,
'RORS': 7,
1926 'TST': 8,
'NEGS': 9,
'CMP': 10,
'CMN': 11,
1927 'ORRS': 12,
'MULS': 13,
'BICS': 14,
'MVNS': 15}
1930 hiregop_name = {
'ADDS': 0,
'CMP': 1,
'MOV': 2}
1933 ldr_str_name = {
'STR': 0,
'LDR': 1}
1936 ldrh_strh_name = {
'STRH': 0,
'LDRH': 1}
1937 bs_ldrh_strh_name =
bs_name(l=1, name=ldrh_strh_name)
1939 ldstsp_name = {
'STR': 0,
'LDR': 1}
1942 addsubsp_name = {
'ADD': 0,
'SUB': 1}
1943 bs_addsubsp_name =
bs_name(l=1, name=addsubsp_name)
1945 pushpop_name = {
'PUSH': 0,
'POP': 1}
1946 bs_pushpop_name =
bs_name(l=1, name=pushpop_name, fname=
'pp')
1948 tbtransfer_name = {
'STMIA': 0,
'LDMIA': 1}
1949 bs_tbtransfer_name =
bs_name(l=1, name=tbtransfer_name)
1951 br_name = {
'BEQ': 0,
'BNE': 1,
'BCS': 2,
'BCC': 3,
'BMI': 4,
1952 'BPL': 5,
'BVS': 6,
'BVC': 7,
'BHI': 8,
'BLS': 9,
1953 'BGE': 10,
'BLT': 11,
'BGT': 12,
'BLE': 13}
1957 armtop(
"mshift", [
bs(
'000'), bs_mshift_name, off5, rsl, rdl], [rdl, rsl, off5])
1959 [
bs(
'000110'), bs_addsub_name, rnl, rsl, rdl], [rdl, rsl, rnl])
1961 [
bs(
'000111'), bs_addsub_name, off3, rsl, rdl], [rdl, rsl, off3])
1962 armtop(
"mcas", [
bs(
'001'), bs_mov_cmp_add_sub_name, rnl, off8])
1963 armtop(
"alu", [
bs(
'010000'), bs_alu_name, rsl, rdl], [rdl, rsl])
1966 [
bs(
'010001'), bs_hiregop_name,
bs(
'00'), rsl, rdl], [rdl, rsl])
1968 [
bs(
'010001'), bs_hiregop_name,
bs(
'01'), rsh, rdl], [rdl, rsh])
1970 [
bs(
'010001'), bs_hiregop_name,
bs(
'10'), rsl, rdh], [rdh, rsl])
1972 [
bs(
'010001'), bs_hiregop_name,
bs(
'11'), rsh, rdh], [rdh, rsh])
1973 armtop(
"bx", [
bs(
'010001'),
bs(
'11'),
bs(
'00'), rsl, dumrh])
1974 armtop(
"bx", [
bs(
'010001'),
bs(
'11'),
bs(
'01'), rsh, dumrh])
1975 armtop(
"ldr", [
bs(
'01001'), rdl, offpc8])
1976 armtop(
"ldrstr", [
bs(
'0101'), bs_ldr_str_name,
1977 trb,
bs(
'0'), rol_noarg, rbl_deref, rdl], [rdl, rbl_deref])
1979 rol_noarg, rbl_deref, rdl], [rdl, rbl_deref])
1981 rol_noarg, rbl_deref, rdl], [rdl, rbl_deref])
1983 rol_noarg, rbl_deref, rdl], [rdl, rbl_deref])
1985 rol_noarg, rbl_deref, rdl], [rdl, rbl_deref])
1987 bs_ldr_str_name, off5bw, rbl_deref, rdl], [rdl, rbl_deref])
1989 [
bs(
'1000'), bs_ldrh_strh_name, off5h, rbl_deref, rdl], [rdl, rbl_deref])
1990 armtop(
"ldstsp", [
bs(
'1001'), bs_ldstsp_name, rdl, offsp8], [rdl, offsp8])
1991 armtop(
"add", [
bs(
'1010'), sppc, rdl, off8sppc], [rdl, sppc, off8sppc])
1992 armtop(
"addsp", [
bs(
'10110000'), bs_addsubsp_name, sp, off7], [sp, off7])
1994 [
bs(
'1011'), bs_pushpop_name,
bs(
'10'), pclr, trlistpclr], [trlistpclr])
1995 armtop(
"btransfersp", [
bs(
'1100'), bs_tbtransfer_name, rbl_wb, trlist])
1996 armtop(
"br", [
bs(
'1101'), bs_br_name, offs8])
1997 armtop(
"blx", [
bs(
"01000111"),
bs(
'10'), rnl,
bs(
'000')])
1998 armtop(
"svc", [
bs(
'11011111'), imm8])
2000 armtop(
"und", [
bs(
'1101'),
bs(
'1110'), imm8_d1])
2003 armtop(
"uxtb", [
bs(
'10110010'),
bs(
'11'), rml, rdl], [rdl, rml])
2004 armtop(
"uxth", [
bs(
'10110010'),
bs(
'10'), rml, rdl], [rdl, rml])
2005 armtop(
"sxtb", [
bs(
'10110010'),
bs(
'01'), rml, rdl], [rdl, rml])
2006 armtop(
"sxth", [
bs(
'10110010'),
bs(
'00'), rml, rdl], [rdl, rml])
2013 armt_gpreg_shift_off = Group(
2014 gpregs_nosppc.parser + allshifts_t_armt + base_expr
2015 ).setParseAction(shift2expr)
2016 armt_gpreg_shift_off |= gpregs_nosppc.parser
2020 reg_info = gpregs_nosppc
2024 parser = armt_gpreg_shift_off
2028 if v >= len(gpregs_nosppc.expr):
2030 r = gpregs_nosppc.expr[v]
2032 i = int(self.parent.imm5_3.value) << 2
2033 i |= int(self.parent.imm5_2.value)
2035 if self.parent.stype.value < 3
or i != 0:
2036 shift = allshifts_armt[self.parent.stype.value]
2038 shift = allshifts_armt[4]
2044 if isinstance(e, ExprId):
2046 self.parent.stype.value = 0
2047 self.parent.imm5_3.value = 0
2048 self.parent.imm5_2.value = 0
2051 r = gpregs_nosppc.expr.index(e.args[0])
2053 i = int(e.args[1].arg)
2056 log.debug(
'rrx shift must be 1')
2058 self.parent.imm5_3.value = 0
2059 self.parent.imm5_2.value = 0
2060 self.parent.stype.value = 3
2062 self.parent.stype.value = allshifts_armt.index(shift)
2063 self.parent.imm5_2.value = i & 3
2064 self.parent.imm5_3.value = i >> 2
2067 rn_nosppc =
bs(l=4, cls=(arm_gpreg_nosppc,), fname=
"rn")
2068 rd_nosppc =
bs(l=4, cls=(arm_gpreg_nosppc,), fname=
"rd")
2069 rm_sh =
bs(l=4, cls=(armt_gpreg_rm_shift_off,), fname=
"rm")
2076 v |= int(self.parent.imm12_3.value) << 8
2077 v |= int(self.parent.imm12_1.value) << 11
2104 v = int(self.expr.arg)
2109 elif v & 0xFF00FF00 == 0
and v & 0xFF == (v >> 16) & 0xff:
2111 value = (1 << 8) | (v & 0xFF)
2112 elif v & 0x00FF00FF == 0
and (v >> 8) & 0xff == (v >> 24) & 0xff:
2114 value = (2 << 8) | ((v >> 8) & 0xff)
2120 value = (3 << 8) | ((v >> 16) & 0xff)
2123 for i
in xrange(32):
2125 if 0 <= o < 0x100
and o & 0x80:
2126 value = (i << 7) | o
2129 log.debug(
'cannot encode imm12')
2132 self.parent.imm12_3.value = (value >> 8) & self.parent.imm12_3.lmask
2133 self.parent.imm12_1.value = (value >> 11) & self.parent.imm12_1.lmask
2141 s = self.parent.sign.value
2142 j1 = self.parent.j1.value
2143 j2 = self.parent.j2.value
2144 imm10h = self.parent.imm10h.value
2147 i1, i2 = j1 ^ s ^ 1, j2 ^ s ^ 1
2149 v = (s << 24) | (i1 << 23) | (
2150 i2 << 22) | (imm10h << 12) | (imm10l << 2)
2156 if not isinstance(self.
expr, ExprInt):
2158 v = self.expr.arg.arg
2162 v = (-v) & 0xffffffff
2165 i1, i2, imm10h, imm10l = (v >> 23) & 1, (
2166 v >> 22) & 1, (v >> 12) & 0x3ff, (v >> 2) & 0x3ff
2167 j1, j2 = i1 ^ s ^ 1, i2 ^ s ^ 1
2168 self.parent.sign.value = s
2169 self.parent.j1.value = j1
2170 self.parent.j2.value = j2
2171 self.parent.imm10h.value = imm10h
2180 s = self.parent.sign.value
2181 j1 = self.parent.j1.value
2182 j2 = self.parent.j2.value
2183 imm10h = self.parent.imm10h.value
2186 i1, i2 = j1 ^ s ^ 1, j2 ^ s ^ 1
2188 v = (s << 24) | (i1 << 23) | (
2189 i2 << 22) | (imm10h << 12) | (imm11l << 1)
2195 if not isinstance(self.
expr, ExprInt):
2197 v = self.expr.arg.arg
2201 v = (-v) & 0xffffffff
2204 i1, i2, imm10h, imm11l = (v >> 23) & 1, (
2205 v >> 22) & 1, (v >> 12) & 0x3ff, (v >> 1) & 0x7ff
2206 j1, j2 = i1 ^ s ^ 1, i2 ^ s ^ 1
2207 self.parent.sign.value = s
2208 self.parent.j1.value = j1
2209 self.parent.j2.value = j2
2210 self.parent.imm10h.value = imm10h
2215 imm12_1 =
bs(l=1, fname=
"imm12_1", order=1)
2216 imm12_3 =
bs(l=3, fname=
"imm12_3", order=1)
2217 imm12_8 =
bs(l=8, cls=(armt2_imm12,), fname=
"imm", order=2)
2220 imm5_3 =
bs(l=3, fname=
"imm5_3")
2221 imm5_2 =
bs(l=2, fname=
"imm5_2")
2222 imm_stype =
bs(l=2, fname=
"stype")
2224 imm1 =
bs(l=1, fname=
"imm1")
2230 v =
sign_ext(((self.parent.imm1.value << 5) | v) << 1, 7, 32)
2235 if not isinstance(self.
expr, ExprInt):
2237 v = self.expr.arg.arg
2240 self.parent.imm1.value = (v >> 6) & 1
2244 imm5_off =
bs(l=5, cls=(armt_imm5_1,), fname=
"imm5_off")
2246 tsign =
bs(l=1, fname=
"sign")
2247 tj1 =
bs(l=1, fname=
"j1")
2248 tj2 =
bs(l=1, fname=
"j2")
2250 timm10H =
bs(l=10, fname=
"imm10h")
2251 timm10L =
bs(l=10, cls=(armt2_imm10l,), fname=
"imm10l")
2252 timm11L =
bs(l=11, cls=(armt2_imm11l,), fname=
"imm11l")
2255 armtop(
"adc", [
bs(
'11110'), imm12_1,
bs(
'0'),
bs(
'1010'), scc, rn_nosppc,
2256 bs(
'0'), imm12_3, rd_nosppc, imm12_8])
2257 armtop(
"adc", [
bs(
'11101'),
bs(
'01'),
bs(
'1010'), scc, rn_nosppc,
2258 bs(
'0'), imm5_3, rd_nosppc, imm5_2, imm_stype, rm_sh])
2259 armtop(
"bl", [
bs(
'11110'), tsign, timm10H,
2260 bs(
'11'), tj1,
bs(
'1'), tj2, timm11L])
2261 armtop(
"blx", [
bs(
'11110'), tsign, timm10H,
2262 bs(
'11'), tj1,
bs(
'0'), tj2, timm10L,
bs(
'0')])
2263 armtop(
"cbz", [
bs(
'101100'), imm1,
bs(
'1'), imm5_off, rnl], [rnl, imm5_off])
2264 armtop(
"cbnz", [
bs(
'101110'), imm1,
bs(
'1'), imm5_off, rnl], [rnl, imm5_off])
2266 armtop(
"bkpt", [
bs(
'1011'),
bs(
'1110'), imm8])